Freescale Semiconductor PowerQUICC MPC870, Справочное руководство

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Buffer Descriptors and Connection Tables
MPC885 PowerQUICC Family Reference Manual, Rev. 2
37-14 Freescale Semiconductor
0x00
(cont.)
13 CDIS Channel disable status. Set by the
STOP RECEIVE
command; cleared by the
RESTART RECEIVE
command.
0 The channel is enabled to receive cells.
1 The channel is disabled. Cells addressed to this channel are discarded.
Note that the user should not modify this bit directly; that is, the
STOP RECEIVE
and
RESTART RECEIVE
commands should be used to control the CDIS bit. However,
CDIS should be cleared during initialization.
14–15 AAL AAL type. Selects the ATM adaptation layer support for receive cells. In PTP,
these bits must be programmed for AAL0.
00 AAL0 (raw-cell channel). The receiver stores cells using the AAL0 buffer
format.
01 AAL5. The receiver performs AAL5 cell reassembly and copies the 48 bytes
of payload to the receive buffer. The AAL5 frame trailer is checked when the
last cell of the PDU is received.
1x Reserved
0x02 — RBALEN (AAL5 only) Receive buffer available length. Contains the number of bytes
available in the receive buffer. When a buffer is opened, the CP initializes
RBALEN with the value programmed in SMRBLR in parameter RAM. RBALEN is
then decremented by 48 for each cell received by the channel.
0x04 — RCRC (AAL5 only) Receive CRC. Contains the CRC32 value calculated during a cell
receive operation.
0x08 — RB_PTR Receive buffer pointer. This field is valid only when INF is set. RB_PTR is the
physical address of the current buffer location to which data is being written.
Should be cleared during initialization.
0x0C — RTMLEN (AAL5 only) Frame buffer count. Contains the total number of bytes received
during the current AAL5 frame. The CP clears RTMLEN at the beginning of a
frame and increments it by the value in SMRBLR in parameter RAM as each
additional buffer is received. The receiver uses RTMLEN to calculate the total
frame length which is then compared to the length field of the frame.
0x0E — RBD_PTR RxBD pointer. Points to the current BD in the RxBD table. The actual address of
the current BD is (RBD_PTR x 4) + RBDBASE (where RBDBASE is the base
pointer to the RxBD memory space). Initialize RBD_PTR to the same value as
RBASE.
Note that RBD_PTR is a word-aligned offset pointer from RBDBASE; that is, it
provides bits [14–29] of the offset, and bits [30–31] are always 00.
0x10 — RBASE RxBD table base. Points to the first BD in the RxBD table of this channel. The
actual address of the table is (RBASE x 4) plus the base address RBDBASE in
the parameter RAM.
Note that RBASE is a word-aligned offset pointer from RBDBASE; that is, it
provides bits [14–29] of the offset, and bits [30–31] are always 00.
0x12 — TSTAMP Time stamp. Contains the arrival time stamp for the current frame. The CP copies
the time value taken from the CP timer (Selected by defining TSTA in parameter
RAM) to the TSTAMP field on the arrival of the frame’s first cell. TSTAMP can be
used to check for a time-out condition.
Note that the time stamp is not supported in port-to-port mode.
Table 37-3. RCT Field Descriptions (continued)
CT Offset Bits Name Description