Universal Serial Bus (USB)
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Freescale Semiconductor
31-7
31.7
USB Host Description
The USB controller when programmed as a host supports a limited host functionality. The following
sections describe the available host functionality, its limitations and the programming model.
Figure 31-4
illustrates the functionality of the USB controller in host mode. The USB controller consists
of transmitter and receiver sections, host control unit and a function control unit, which is used for testing
purposes. The USB transmitter contains four independent FIFOs, each containing 16 bytes. Endpoint 0 is
dedicated for host transactions, endpoints 1-3 are for function transactions in test mode. There is a
IN
To guarantee a transfer, the control software must preload the endpoint FIFO with a data packet before
receiving an IN token. Software should set up the endpoint TxBD table and set USCOM[STR]. The USB
controller fills the transmit FIFO and waits for the IN token. Once the token is received and the FIFO has
been loaded with the last data byte or with at least four bytes, transmission begins. The four-byte
minimum is a threshold to prevent underruns in the FIFO.
If data is not ready in the transmit FIFO or if USEP
n[THS] is set to respond with NAK, a NAK handshake
is returned. If USEP
n[THS] was set to respond with STALL, a STALL handshake is returned. (See table
below.) When the end of the last buffer is reached (TxBD[L] is set), the CRC is appended. After the frame
is sent, the USB controller waits for a handshake packet. If the host fails to acknowledge the packet, the
timeout status bit TxBD[TO] is set. Software must set the proper DATA0/DATA1 PID in the transmitted
packet.
USB In Token Reception
USEP
n[THS]
FIFO Loaded
Handshake Sent to Host
00 (Normal)
No
NAK
Yes
Data packet is sent.
01 (Ignore)
—
None
10 (NAK)
—
NAK
11 (STALL)
—
STALL
SETUP
The format of setup transactions is similar to OUT but uses a SETUP rather than an OUT PID. A SETUP
token is recognized only by a control endpoint. When a SETUP token is received, setup reception
begins. The USB controller fetches the next BD associated with the endpoint; if it is empty, the controller
starts transferring the incoming packet to the buffer. When the buffer is full, the USB controller clears
RxBD[E] and generates an interrupt if RxBD[I] = 1. If the incoming packet is larger than the buffer, the
USB controller fetches the next BD and, if it is empty, continues transferring the rest of the packet to this
buffer. The entire data packet including the DATA0 PID is written to the receive buffers. If the packet was
received without CRC or bit stuff errors, an ACK handshake is sent to the host. If an error occurs, no
handshake packet is returned and error status bits are set in the last RxBD associated with this packet.
Start of Frame
(SOF)
When an SOF packet is received, the USB controller issues a SOF maskable interrupt and the frame
number entry in the parameter RAM is updated.
Preamble
(PRE)
The PRE token signals the hub that a low-speed transaction is about to occur. The PRE token is read
only by the hub. The USB controller ignores the PRE token function in function mode.
Table 31-2. USB Tokens (continued)
Token
Description
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