Renesas M32R/ECU Series, User Manual

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11
11-43
A-D Converters
32180 Group User's Manual (Rev.1.0)
Figure 11.5.1 Internal Equivalent Circuit of the Analog Input Part
11.5 Precautions on Using A-D Converters
• Forcible termination during scan operation
If A-D conversion is forcibly terminated by setting the A-D conversion stop bit (AD0CSTP or AD1CSTP) to "1"
during scan mode operation and the A-D data register for the channel that was in the middle of conversion is
accessed for read, the read value shows the last conversion result that had been transferred to the data register
before the conversion was forcibly terminated.
• Modification of the A-D converter related registers
If the content of any register—A-D Conversion Interrupt Control Register, Single or Scan Mode Registers or A-D
Successive Approximation Register, except the A-D conversion stop bit—is modified in the middle of A-D conver-
sion, the conversion result cannot be guaranteed. Therefore, do not modify the contents of these registers while A-
D conversion is in progress, or be sure to restart A-D conversion if register contents have been modified.
• Handling of analog input signals
When using the A-D Converter with its sample-and-hold function disabled, make sure the analog input level is
fixed during A-D conversion.
• A-D conversion completed bit read timing
To read the A-D conversion completed bit (Single Mode Register 0 bit 5 or Scan Mode Register 0 bit 5) immediately after A-D
conversion has started, be sure to adjust the timing 2 BCLK periods by, for example, inserting a NOP instruction before read.
• Regarding the analog input pins
Figure 11.5.1 shows the internal equivalent circuit of the A-D Converter’s analog input part. To obtain accurate
A-D conversion results, make sure the internal capacitor C2 of the A-D conversion circuit is charged up within a
predetermined time (sampling time). To meet this sampling time requirement, it is recommended that a stabiliz-
ing capacitor C1 be connected external to the chip.
The method for determining the necessary value of this external stabilizing capacitor with respect to the output
impedance of an analog output device is described below. Also, an explanation is made of the case where the
output impedance of an analog output device is low and the external stabilizing capacitor C1 is unnecessary.
• Rated value of the absolute accuracy
The rated value of the absolute accuracy is the actual performance value of the microcomputer alone, with
influences of the power supply wiring and noise on the board not taken into account. When designing the
application system, use caution for the board layout by, for example, separating the analog circuit power supply
and ground (AVCC, AVSS and VREF) from those of the digital circuit and incorporating measures to prevent the
analog input pins from being affected by noise, etc. from other digital signals.
11.5 Precautions on Using A-D Converters
Comparator
Inside the microcomputer
10-bit A-D Successive
Approximation Register (ADiSAR)
10-bit D-A Converter
VREF
V2
C2
Cin : input pin capacitance (approx. 10 pF)
R2 : parasitic resistance of the
selector (1-2 K
Ω
)
C2 : comparator capacitance
(approx. 2.9 pF)
Selector
R2
i
i1
i2
→
ADIN n
→
C1
E
R1
↓
C1 : parasitic capacitance of the board
+ stabilizing capacitance
R1 : resistance of analog output device
Analog output device
Cin
E : voltage of analog output device
V2 : voltage across C2
VREF : analog reference voltage