Renesas M32R/ECU Series, User Manual

Page: 541 / 839

12
12-50
SERIAL I/O
12.7 Receive Operation in UART Mode
32180 Group User's Manual (Rev.1.0)
12.7.2 Starting UART Reception
The serial I/O starts receive operation when all of the following conditions are met after being initialized.
• SIO Receive Control Register receive enable bit is set to "1"
• Start bit (falling edge signal) is applied to the RXD pin
When the above conditions are met, the serial I/O enters UART receive operation. However, the start bit is
checked again at the first rise of the internal receive shift clock and if it is detected high for reasons of noise, etc.,
the serial I/O stops receive operation and waits for the start bit again.
12.7.3 Processing at End of UART Reception
When data reception finishes, the following operation is automatically performed in hardware.
(1) When reception is completed normally
The reception finished (receive buffer full) bit is set to "1".
Notes: • An interrupt request is generated if the reception finished (receive buffer full) interrupt has been
enabled.
• A DMA transfer request is generated.
(2) When a receive error occurred
If an error occurred, the corresponding error bit (OE, FE or PE) and the receive error sum bit are set to "1".
Notes: • If the reception finished interrupt has been selected (by SIO Receive Interrupt Request Source
Select Register), a reception finished interrupt request is generated when interrupt requests
are enabled. However, this does not apply when the detected error is an overrun error, in which
case no reception finished interrupt requests are generated.
• If the receive error interrupt has been selected (by SIO Receive Interrupt Request Source
Select Register), a receive error interrupt request is generated when interrupt requests are
enabled.
• No DMA transfer requests are generated.