Renesas M32R/ECU Series, User Manual

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13
32180 Group User’s Manual (Rev.1.0)
13.2 CAN Module Related Registers
CAN MODULE
• Procedure for entering BasicCAN mode
Follow the procedure below during initialization:
1) Set the ID for slots 14 and 15 and the local mask registers A and B. (We recommend setting the same
value.)
2) Set the frame types to be handled by slots 14 and 15 (standard or extended) in the CAN Extended ID
Register. (We recommend setting the same type.)
3) Set the Message Slot Control Registers for slots 14 and 15 for data frame reception.
4) Set the BCM bit to "1".
Notes: • Do not change settings of the BCM bit while CAN is operating (CAN Status Register CRS
bit = "0").
• The first slot that is active after clearing the RST bit is slot 14.
• Even during BasicCAN mode, slots 0 to 13 can be used the same way as in normal
operation.
(6) LBM (Loopback Mode) bit (Bit 14)
When the LBM bit is set to "1", if a receive slot exists whose ID matches that of the frame sent by the CAN
module itself, then the frame can be received.
Notes: • ACK is not returned for the transmit frame.
• Do not change settings of the LBM bit while CAN is operating (CAN Status Register CRS bit = "0").
(7) RST (CAN Reset) bit (Bit 15)
When the RST bit is cleared to "0", the CAN module is connected to the CAN bus and becomes ready to
communicate after detecting 11 consecutive recessive bits. Also, the CAN Timestamp Count Register
thereby starts counting. When the RST bit is set to "1", the CAN module is reset so that when a bus idle state
is entered after sending frames from the slots which have had transmit requests set by that time, the protocol
control unit is reset and the CAN module is disconnected from the CAN bus. Frames received during this time
are processed normally.
Notes: • It is inhibited to set a new transmit request until the CAN Status Register CRS bit is set to "1"
and the protocol control unit is reset after setting the RST bit to "1".
• When the protocol control unit is reset by setting the RST bit to "1", the CAN Timestamp Count
and CAN Transmit/Receive Error Count Registers are initialized to "0".
• In order for CAN communication to start, the FRST and RST bits must be cleared to "0".