Renesas M32R/ECU Series, User Manual

Page: 198 / 839

8
8-25
INPUT/OUTPUT PORTS AND PIN FUNCTIONS
32180 Group User’s Manual (Rev.1.0)
8.4 Port Input Level Switching Function
Port Group 0,1 Input Level Setting Register (PG01LEV) <Address: H’0080 0760>
1 2 3 4 5 6 b7 b0
WF0SEL PT0SEL VT0SEL0 VT0SEL1 WF1SEL PT1SEL VT1SEL0 VT1SEL1
0 0 0 1 0 0 0 1
Port Group 2,3 Input Level Setting Register (PG23LEV) <Address: H’0080 0761>
9 10 11 12 13 14 b15 b8
WF2SEL PT2SEL VT2SEL0 VT2SEL1 WF3SEL PT3SEL VT3SEL0 VT3SEL1
0 0 0 1 0 0 0 1
Port Group 4,5 Input Level Setting Register (PG45LEV) <Address: H’0080 0762>
1 2 3 4 5 6 b7 b0
WF4SEL PT4SEL VT4SEL0 VT4SEL1 WF5SEL PT5SEL VT5SEL0 VT5SEL1
0 0 0 1 0 0 0 1
Port Group 6,7 Input Level Setting Register (PG67LEV) <Address: H’0080 0763>
9 10 11 12 13 14 b15 b8
WF6SEL PT6SEL VT6SEL0 VT6SEL1 WF7SEL PT7SEL VT7SEL0 VT7SEL1
0 0 0 1 0 0 0 1
Port Group 8 Input Level Setting Register (PG8LEV) <Address: H’0080 0764>
1 2 3 4 5 6 b7 b0
WF8SEL PT8SEL VT8SEL0 VT8SEL1
0 0 0 1 0 0 0 0
Note: • The PG8LEV register bits 4–7 have no functions assigned.
<After reset: B’0001>
b Bit Name Function R W
0(4) WFnSEL 0: Select standard input for each pin R W
8(12) Group n dual-function input select bit 1: Select threshold switching function
1(5) PTnSEL 0: Select CMOS input R W
9(13) Group n port input select bit 1: Select Schmitt input
2–3 VTnSEL <When PTnSEL = "0" (CMOS input selected)> R W
(6–7) Group n input threshold select bit 00: Select 0.35 VCCE
10–11 01: Select 0.5 VCCE
(14–15) 10: Select 0.7 VCCE
11: Settings inhibited
<When PTnSEL = "1" (Schmitt input selected)>
00: VT+ = 0.5 VCCE
VT– = 0.35 VCCE
01: Settings inhibited
10: VT+ = 0.7 VCCE
VT– = 0.35 VCCE
11: VT+ = 0.7 VCCE
VT– = 0.5VCCE
Note: • The following ports operate with the VCC-BUS power supply, and not with the VCCE power supply. Therefore, the reference
voltages for these ports are the VCC-BUS input voltage.
P00–P07, P10–P17, P20–P27, P30–P37, P41–P47, P70–P73, P224–P227