Renesas M32R/ECU Series, User Manual

Page: 724 / 839

19
19-5
JTAG
32180 Group User's Manual (Rev.1.0)
19.3 JTAG Registers
19.3.2 Data Register
(1) Boundary Scan Register (JTAGBSR)
The Boundary Scan Register is a 475-bit register used to perform boundary-scan test. The bits in this register
are assigned to each pin on the microcomputer.
Connected between the JTDI and JTDO pins, this register is selected when issuing EXTEST or SAMPLE/
PRELOAD instruction. In the Capture-DR state, this register captures the status of input pins or internal logic
outputs. In the Shift-DR state, while outputting the sampled value, this register receives the input data for
boundary-scan test to set pin functions (direction of input/output and tristate output pins) and output values.
(2) Bypass Register (JTAGBPR)
The Bypass Register is a 1-bit register used to bypass the boundary-scan path when the microcomputer is
not the target of boundary-scan test. Connected between the JTDI and JTDO pins, this register is selected
when issuing BYPASS instruction. This register is loaded with b’0 (fixed value) in the Capture-DR state.
(3) ID Code Register (JTAGIDR)
The ID Code Register is a 32-bit register used to identify the device and manufacturer. It holds the following
information:
• Version information (4 bits) : b’0000
•
Part number (16 bits) : b’0011 0010 0010 0011
•
Manufacturer ID (11 bits) : b’000 0001 1100
This register is connected between the JTDI and JTDO pins, and is selected when issuing IDCODE instruc-
tion. This register is loaded with said IDCODE data in the Capture-DR state, and outputs it from the JTDO pin
in the Shift-DR state.
The ID Code Register is a read-only register. Because the data written from the JTDI pin during DR path
sequence is ignored, make sure JTDI input = low while in the Shift-DR state.
Note: • For details about the Capture-DR and Shift-DR states, see Section 19.4, “Basic Operation of
JTAG.”
3 0 4 19 20 31 30
1 Manufacturer ID Part number Version
4 bits 16 bits 11 bits