19
19-10
JTAG
32180 Group User's Manual (Rev.1.0)
Note 1: The setup value for each register must be supplied LSB-first from the JTDI pin.
Note 2: The value in each register is output from the JTDO pin beginning with the LSB. It is only in the Shift-IR state of IR path
sequence and the Shift-DR state of DR path sequence that valid data is output from the JTDO pin. In all other states,
the JTDO pin goes to a high-impedance state.
Note 3: This shows readout from the data register selected by the instruction that was set in the immediately preceding IR path
sequence. The value sampled during Capture-DR state is output at the shift register stage of the selected data register.
Test-Logic-
Reset state
Run-Test
/Idle state
IR path
sequence
DR path
sequence
Run-Test
/Idle state
IR path
sequence
DR path
sequence
TAP states
Instruction
code
#0
Setup data
#0
#1
Setup data
#1
JTDI
Fixed value
b'110001
(Note 3)
b'110001
JTDO
Setup data is serially fed from JTDI.
Reference data is serially output from JTDO.
(1) Basic access
Test-Logic-
Reset state
Run-Test
/Idle state
IR path
sequence
DR path
sequence
#0
#0
#1
#2
JTDI
b'110001
(Note 3)
JTDO
The same data register can be successively
operated on to set or inspect.
(2) Successive accesses to the same data register
Run-Test
/Idle state
(Note 3)
(Note 3)
Specify the data register
to inspect or set.
(Note 1)
(Note 2)
(Note 1)
(Note 2)
DR path
sequence
DR path
sequence
Setup data
Setup data
(Note 3)
Fixed value
Fixed value
Specify the data register
to inspect or set.
TAP states
Instruction
code
Instruction
code
Setup data
Figure 19.4.5 Successive JTAG Access
19.4.4 Inspecting and Setting Data Registers
To inspect or set the data register, follow the procedure described below.
(1) To access the test access port (JTAG) for the first time, apply a test reset (to initialize the test circuit). One
of the following two methods may be used to apply a test reset:
• Pull the JTRST# pin low.
• Drive the JTMS pin high to apply 5 or more JTCK cycles
(2) Apply JTMS = low to enter the Run-Test/Idle state. To continue the idle state, hold JTMS input low.
(3) Apply JTMS = high to exit the Run-Test/Idle state and perform IR path sequence. In the IR path sequence,
specify the data register to inspect or set.
(4) Proceed to perform DR path sequence. Feed setup data from the JTDI pin into the data register specified
in the IR path sequence, and read out reference data from the JTDO pin.
(5) To proceed to perform IR path or DR path sequence after the DR path sequence is completed, apply
JTMS = high to return to the Select-DR-Scan state.
To wait for the next processing after a series of IR and DR sequence processing is completed, apply JTMS
= low to enter the Run-Test/Idle state and keep that state.
19.4 Basic Operation of JTAG
Summary of Contents for M32R/ECU Series
Page 17: ...12 This page is blank for reasons of layout...
Page 712: ...CHAPTER 18 OSCILLATOR CIRCUIT 18 1 Oscillator Circuit 18 2 Clock Generator Circuit...
Page 794: ...CHAPTER 22 TYPICAL CHARACTERISTICS...
Page 796: ...APPENDIX 1 MECHANICAL SPECIFICAITONS Appendix 1 1 Dimensional Outline Drawing...
Page 798: ...APPENDIX 2 INSTRUCTION PROCESSING TIME Appendix 2 1 32180 Instruction Processing Time...
Page 802: ...APPENDIX 3 PROCESSING OF UNUSED PINS Appendix 3 1 Example Processing of Unused Pins...