12
12-52
SERIAL I/O
12.7 Receive Operation in UART Mode
32180 Group User's Manual (Rev.1.0)
12.7.4 Example of UART Receive Operation
The following shows a typical receive operation in UART mode.
Figure 12.7.3 Example of UART Reception (When Received Normally)
<UART on receive side>
<UART on receive side>
<UART on transmit side>
TXD
RXD
Note 1: Changes of the Interrupt Controller's SIO Receive Interrupt Control Register interrupt request bit
Note 2: When reception finished interrupt is enabled (DMA transfer can also be requested at the same time)
Note 3: The Interrupt Controller's IVECT register is read or the SIO Receive Interrupt Control Register interrupt
request bit cleared
Receive enable bit
(SIO Receive Control Register)
b0
b6
b7
ST
SP
SP
PAR
Reception finished bit
RXD
Set
Cleared
: Processing by software
: Interrupt request generated
Internal clock selected
Read from the
receive buffer
Reception finished
interrupt request
(Note 2)
Interrupt request accepted (Note 3)
Receive status bit
Automatically cleared for
each receive operation
performed
SIO receive interrupt
request (Note 1)
(When reception finished
interrupt is selected)
(When receive error
interrupt is selected)
No interrupt request
Summary of Contents for M32R/ECU Series
Page 17: ...12 This page is blank for reasons of layout...
Page 712: ...CHAPTER 18 OSCILLATOR CIRCUIT 18 1 Oscillator Circuit 18 2 Clock Generator Circuit...
Page 794: ...CHAPTER 22 TYPICAL CHARACTERISTICS...
Page 796: ...APPENDIX 1 MECHANICAL SPECIFICAITONS Appendix 1 1 Dimensional Outline Drawing...
Page 798: ...APPENDIX 2 INSTRUCTION PROCESSING TIME Appendix 2 1 32180 Instruction Processing Time...
Page 802: ...APPENDIX 3 PROCESSING OF UNUSED PINS Appendix 3 1 Example Processing of Unused Pins...