11
11-24
A-D Converters
32180 Group User's Manual (Rev.1.0)
11.2 A-D Converter Related Registers
11.2.5 A-D Conversion Speed Control Registers
A-D0 Conversion Speed Control Register (AD0CVSCR)
<Address: H’0080 0087>
A-D1 Conversion Speed Control Register (AD1CVSCR)
<Address: H’0080 0A87>
9
10
11
12
13
14
b15
b8
ADCVSD
0
0
0
0
0
0
0
0
<After reset: H’00>
b
Bit Name
Function
R
W
8–14
No function assigned. Fix to "0".
0
0
15
ADCVSD (Note 1)
0: Slow mode
R
W
A-D conversion speed control bit
1: Fast mode
Note 1: The A-D conversion speed is determined by a combination of ADCVSD bit and A-D Single Mode Register 1’s relevant bit
during single mode, or a combination of ADCVSD bit and A-D Scan Mode Register 1’s relevant bit during scan mode.
The A-D Conversion Speed Control Registers control the A-D conversion speed during single and scan modes
of the A-D Converter.
Summary of Contents for M32R/ECU Series
Page 17: ...12 This page is blank for reasons of layout...
Page 712: ...CHAPTER 18 OSCILLATOR CIRCUIT 18 1 Oscillator Circuit 18 2 Clock Generator Circuit...
Page 794: ...CHAPTER 22 TYPICAL CHARACTERISTICS...
Page 796: ...APPENDIX 1 MECHANICAL SPECIFICAITONS Appendix 1 1 Dimensional Outline Drawing...
Page 798: ...APPENDIX 2 INSTRUCTION PROCESSING TIME Appendix 2 1 32180 Instruction Processing Time...
Page 802: ...APPENDIX 3 PROCESSING OF UNUSED PINS Appendix 3 1 Example Processing of Unused Pins...
