NOVA electronics Inc. MCX514 -
157
－
157
－
Specify the address set by A2 (22), A1 (23), A0 (24) pins of MCX514 to CA2
～
CA0 of chip address. Low is 0 and Hi is 1.
As for a register address, specify the register address that the user wants to read, referring to the following table. Although RR
register is 16-bit configuration, but I
2
C data transfer must be specified in bytes.
Table 4.2-2 Register Address for Reading
Register Address
RRn Register
RA3 RA2 RA1 RA0
0
0
0
0
RR0L
0
0
0
1
RR0H
0
0
1
0
RR1L
0
0
1
1
RR1H
0
1
0
0
RR2L
0
1
0
1
RR2H
0
1
1
0
RR3L
0
1
1
1
RR3H
1
0
0
0
RR4L
1
0
0
1
RR4H
1
0
1
0
RR5L
1
0
1
1
RR5H
1
1
0
0
RR6L
1
1
0
1
RR6H
1
1
1
0
RR7L
1
1
1
1
RR7H
RRnL is the low byte (D7
～
D0) of RRn.
RRnH is the high byte (D15
～
D8) of RRn.
The last bit D0 for writing of slave address is the bit to designate reading / writing. When reading, set it to 1.
If the slave address is sent by 8SCL, MCX514 returns ACK to SDA signal in the 9th SCL. When it receives 8-bit slave address
correctly, MCX514 corresponding to the chip address returns Low (open drain output is turned ON). When it is not received
correctly or the chip addresses do not match, not return Low.
■
Read data
Then, perform data reading. The data for reading is outputted from RRn register specified by the slave address to the SDA line,
byte by byte. From only one byte to multiple bytes continuously can be read. In the 9th SCL after receiving 1 byte, if the CPU
correctly receives, it is necessary to return ACK signal of Low level to the SDA line. However, in the last data that comes stop
condition next, return ACK signal of Hi level.
Fig. 4.2-4 Data Reading
■
Generate stop condition
To stop data reading, the user needs to generate stop condition. When SCL signal is Hi and SDA signal changes from Low to Hi, it
becomes stop condition. Whenever sending and receiving, the host CPU must generate this stop condition at the end.
R
ACK
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
ACK
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
1
2
3
4
5
6
7
8
9
ACK
Reading data of
register address n
Reading data of
register address n+1
Slave address
Start
Stop
SCL
SDA
