NOVA electronics Inc. MCX514 -
203
-
203
-
7.3.3
PIO Signal Setting 2
・
Other Settings
Code
Command
Symbol
Data Length (byte)
22
h
PIO signal setting 2
・
Other settings
P2M
2
“P2M” is the parameter setting the logical level of a synchronous pulse and pulse width. In addition, it can set the synchronous
action disabling when an error occurs, the mode setting for driving by external signals, the logical level of split pulse output and
with or without starting pulse.
WR6
D7
D6
D5
D4
H
L
D15
D14
D13
D12
D11
D10
D9
D8
D3
D2
D1
D0
P0L
P1L
P2L
P3L
PW0
PW1
PW2
ERRDE
EXOP0
EXOP1
SPLL
SPLBP
0
0
0
0
Split Pulse
Driving by
External Signals
Synchronous Pulse Output
D3
~
0 PnL
Setting the logical level of pulses for when nPIOm (m
:
3~0) is used as synchronous pulse output signal.
0: positive logical pulse, 1: negative logical pulse
Positive Logical Pulse
:
Negative Logical Pulse
:
D6
~
4 PW2
~
0
Setting the output pulse width of synchronous pulse output signal.
(When CLK=16MHz)
D6
~
4
(PW2
~
0)
Output Pulse Width
0
125
n
sec
1
312
n
sec
2
1μsec
3
4μsec
4
16μsec
5
64μsec
6
256μsec
7
1
m
sec
D7 ERRDE
Setting for whether the enabling status of synchronous action SYNC3~0 is disabled or not when an error
occurs (RR0/D7
~
4
:
n-ERR = 1).
0: not disable at the error, 1: disable at the error
When this bit is set to 1, and when n-ERR bit of RR0 register becomes 1, synchronous action SYNC3~0 is
all disabled immediately.
When n-ERR bit of RR0 register is 1, synchronous action SYNC3~0 cannot be enabled again. Clear the
error bit by such as the error/finishing status clear command (79h) and then set the synchronous action
enable setting.
Error status and enable / disable setting of synchronous action SYNC3~0 can be checked by Page 1 of RR3
register.
D9,8 EXOP1,0
Setting the external input signals (nEXPP, nEXPM) for driving.
D9(EXOP1)
D8(EXOP0)
Driving mode by external signals
0
0
Driving disabled by external signals
0
1
Continuous driving mode
1
0
Relative position driving mode
1
1
Manual pulsar mode
Output Pulse Width
(Positive Logical Pulse)