NOVA electronics Inc. MCX514 -
183
-
183
-
D8 SYNC
If the driving is stopped by one of synchronous actions (SYNC3 ~ 0), it will become 1.
D11
~
9 STOP2
~
0
If the driving is stopped by one of external stop signals (nSTOP2~ 0), it will become 1.
D12 LMT+
If the driving is stopped by +direction limit signal (nLMTP), it will become 1.
D13 LMT-
If the driving is stopped by −direction limit signal (nLMTM), it will become 1.
D14 ALARM
If the driving is stopped by nALARM from a servo driver, it will become 1.
D15 EMG
If the driving is stopped by external emergency signal (EMGN), it will become 1.
Driving finishing status (D15~D8) is the bit indicates the finishing factor of driving. There are 3 factors that terminate driving as
shown below other than the factors that the status of driving finishing (D15~D8) indicate.
a. when all the drive pulses are output in fixed pulse driving,
b. when deceleration stop or instant stop command is written,
c. when software limit is enabled, and is active,
Make sure to check the status of driving finishing (D15~D8) after confirming the driving is finished by the n-DRV bit of RR0
main status register.
6.14
Status Register 3: RR3
Each axis has status register RR3 individually. The host CPU specifies the status register of which axis should be accessed
depends on the axis of written command just before. Or the user can specify the axis by writing NOP command with axis
assignment.
Status register RR3 has 2 kinds of pages, Page 0 and Page1. Page 0 is used for displaying the input signal status and automatic
home search execution state. Page 1 is used for displaying: (1). enable/disable of a synchronous action, (2).
acceleration/deceleration status in acceleration/deceleration driving, (3). acceleration increasing/decreasing status in S-curve
acceleration/deceleration, (4). timer operating state, (5). split pulse operating state, (6). transfer error status during multichip
interpolation.
The page can be designated by writing RR3 Page Display Command (7Ah, 7Bh). It will be Page 0 at reset.
STOP0
D7
D6
D5
D4
H
L
D15
D14
D13
D12
D11
D10
D9
D8
D3
D2
D1
D0
RR3 Page0
STOP1
STOP2
ECA
ECB
INPOS
ALARM
LMTP
LMTM
HSST0
HSST1
HSST2
HSST3
HSST4
HSST5
0
SYNC0
D7
D6
D5
D4
H
L
D15
D14
D13
D12
D11
D10
D9
D8
D3
D2
D1
D0
SYNC1
SYNC2
SYNC3
ASND
CNST
DSND
AASND
ACNST
ADSND
TIMER
SPLIT
MCERR
0
0
1
RR3 Page1
■
Page 0
The input signal status bit of each signal is 0 if the input is on the Low level and 1 if the input is on the Hi level. When the
functions of D8~D0 input signals are not used, they can be used as general purpose input signals.
In the description below, the number in brackets after signal name indicates the pin number from X axis to U axis in order.
D2
~
0 STOP2
~
0
Displaying the input status of external stop signals nSTOP2(70,91,110,129), nSTOP1(73,92,111,130),
nSTOP0(74,93,112,131).
D3 ECA
Displaying the input status of encoder input pulse signal nECA/PPIN (45,47,49,51).
The pin number for this bit does not change even though the pin inversion of encoder pulse input
(WR3/D11
:
PIINV) is set.
D4 ECB
Displaying the input status of encoder input pulse signal nECB/PMIN (46,48,50,52).
The pin number for this bit does not change even though the pin inversion of encoder pulse input
(WR3/D11
:
PIINV) is set.