NOVA electronics Inc. MCX514 -
204
-
204
-
D10 SPLL
The logical level of split pulse output.
0: positive logical pulse, 1: negative logical pulse
Positive Logical Pulse
:
Negative Logical Pulse
:
D11 SPLBP
With or without starting pulse of split pulse output.
0: without starting pulse, 1: with starting pulse
D15~D0 will be set to 0 at reset. D15~D12 should always be set to 0.
7.3.4
Automatic Home Search Mode Setting 1
Code
Command
Symbol
Data Length (byte)
23
h
Automatic home search mode setting 1
H1M
2
“H1M” is the parameter setting the automatic home search mode. Enable / disable of each step for automatic home search, search
direction, stop signal selectable, enable / disable of deviation counter clear output and position counter clear.
WR6
D7
D6
D5
D4
H
L
D15
D14
D13
D12
D11
D10
D9
D8
D3
D2
D1
D0
S1EN
S1DR
S1G0
S1G1
S2EN
S2DR
S2SG
S2RC S2DC
S2LC
S3EN
S3DR
S3RC S3DC
S3LC
S4EN
Step 1
Step 2
Step 3
Step 4
D0 S1EN
Setting for whether “high-speed search” of step 1 in the automatic home search is executed or not.
0: non-execution, 1: execution
D1 S1DR
The search direction of step 1.
0: + direction, 1: − direction
D3,2 S1G1,0
The search signal of step 1.
Use the WR2 register for logical setting of the input signal that is detected.
D3(S1G1)
D2(S1G0)
Search Signal
0
0
nSTOP0
0
1
nSTOP1
1
0
Limit signal *
1
1
(Invalid)
* If a limit signal is specified, the limit signal in the search direction specified by D1(S1DR) will be
selected.
D4 S2EN
Setting for whether “low-speed search” of step 2 in the automatic home search is executed or not.
0: non-execution, 1: execution
D5 S2DR
The search direction of step 2.
0: + direction,
1: − direction
D6 S2SG
The search signal of step 2.
Use the WR2 register for logical setting of the input signal that is detected.
D6(S2SG)
Search Signal
0
nSTOP1
1
Limit signal *