Mitsubishi Electric apricot VS660, System Product Manual

Page: 14 / 154

System Product Guide
1-3
Central Processing Unit (CPU)
The system is designed to operate with the Intel Pentium microprocessor.
The Pentium processor, in addition to its expanded data and addressing
capabilities, includes the following features:
•
Ready for next generation OverDrive

processor
•
Backward compatibility with Intel microprocessor architecture
•
Onchip numeric coprocessor (compatible with the Intel486

DX
processor and compliant with ANSI/IEEE standard 754-1985)
•
Onchip 16 KB cache (8 KB for data, 8 KB for code)
•
Burst-mode bus cycles
Chapter 5 tells how to upgrade the CPU.
System Memory
The system supports base (conventional) and extended memory. Operating
systems such as MS-DOS
†
, OS/2
†
, UNIX
†
, and all application programs use
base memory. For better performance, Windows 95, OS/2 and UNIX as well
as many MS-DOS applications use extended memory. For the system
memory map, see Chapter 7.
The system supports up to 128 MB of DRAM. DRAM is implemented
through four 72-pin single in-line memory modules (SIMMs). Chapter 5 tells
how to install memory modules.
Cache Memory
The Pentium microprocessor includes 16 KB of cache on the chip. The core
chip set includes a cache controller that supports secondary write-back cache
memory. The system can support 256 KB of secondary cache memory.