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Commands in DSR Application Subsystems
Clock Output Commands
296
Agilent 81250 Parallel Bit Error Ratio Tester, Programming Reference, March 2006
:CLOCk:OUTPut:TCONfig
Syntax
CGRoup(*):MODule(*):CONNector(*):CLOCk:OUTPut:TCONfig <VOLTage |
DIFFerential>
SGENeral:PDATa(*):CLOCk:OUTPut:TCONfig <VOLTage | DIFFerential>
SGENeral:PDATa(*):TERMinal(*):CLOCk:OUTPut:TCONfig <VOLTage |
DIFFerential>
<VOLTage | DIFFerential>
Selects the termination model for the
N4872/74’s clock output:
• VOLTage selects termination via resistor against a termination
voltage (this is the reset value).
If VOLTage is selected, the termination resistor and termination
voltage can be set with
“:CLOCk:OUTPut:IMPedance:EXTernal” on
page 294
and
“:CLOCk:OUTPut:TVOLtage” on page 297
.
• DIFFerential selects termination via a resistor against the
complement output.
If DIFFerential is selected, the differential termination resistor can
be set with
“:CLOCk:OUTPut:DIMPedance:EXTernal” on page 295
.
Description
It is necessary to specify how the output signal will be terminated.
There are two possible termination models available:
• Via a resistor against a termination voltage; the resistor might be
high impedance. Optimum signal performance is achieved with 50
Ohm. In the following picture this is shown for single-ended and
differential outputs.
50 / HiZ
V
OUT
50
50
V
OUT
~OUT
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