Intel Embedded Intel486, Справочник по аппаратуре

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EMBEDDED Intel486™ PROCESSOR HARDWARE REFERENCE MANUAL
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9.6.2 An Example of a Second-Level Cache
The 485Turbocache* Module was a high performance cache designed for the Intel486 processor.
This Module provides 64- or 128-Kbytes of cache depth. Multiple 485Turbocache Modules could
be cascaded to give 256 Kbyte or 512-Kbyte cache depths. The 485Turbocache Module is orga-
nized as a 64- or 128-Kbyte, 2-way set-associative memory. Like the processor, the
485Turbocache Module has a line size of four doublewords. On a cache read operation the ad-
dress is presented to the 485Turbocache Module, and the tags are compared. If they match, a hit
condition has occurred and the data is burst to the Intel486 processor. Data can be sent over in
two cycles for the first word, and one cycle for each of the subsequent three doublewords. This
implies the fastest read cycle time for cache hits on the 485Turbocache Module. For cache miss-
es, the data is fetched from the main memory, and then sent to both the Intel486 processor and
the 485Turbocache Module. On write operations, the 485Turbocache Module operates like the
Intel486 processor’s cache by updating write hits and not updating write misses. The main mem-
ory is updated on all writes, because of the write-through policy.
9.6.3 System Performance with a Second-Level Cache
The performance of an example L2 cache is shown in Figure 9-5 . The 1.0 level of performance
reflects an Intel486 processor system that operates with 2-1-2 memory accesses. For example, a
system which has 4-2-4 cycles for page hits and 7-2-5 cycles for page misses may result in less
than 0.6 of optimum (2-1-2) performance with no cache. Adding 256 K of external cache and one
level of write buffering to this system increases the performance level to greater than 0.9 optimum
performance.