Intel Embedded Intel486, Справочник по аппаратуре

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INTRODUCTION
• Dynamic Bus Sizing — External controllers can dynamically alter the effective width of the
data bus. Bus widths of 8, 16, or 32 bits can be used (the 8-bit and 32-bit bus widths are not
available on the Ultra-Low Power Intel486 GX processor).
• Boundary Scan (JTAG) — Boundary Scan provides in-circuit testing of components on
printed circuit boards. The Intel Boundary Scan implementation conforms with the IEEE
Standard Test Access Port and Boundary Scan Architecture.
SL Technology provides the following features:
• Intel System Management Mode — A unique Intel architecture operating mode provides a
dedicated special purpose interrupt and address space that can be used to implement
intelligent power management and other enhanced functions in a manner that is completely
transparent to the operating system and applications software.
• I/O Restart — An I/O instruction interrupted by a System Management Interrupt (SMI#)
can automatically be restarted following the execution of the RSM instruction.
• Stop Clock — The Intel486 processor has a stop clock control mechanism that provides two
low-power states: a “fast wake-up” Stop Grant state and a “slow wake-up” Stop Clock state
with CLK frequency at 0 MHz.
• Auto HALT Power Down — After the execution of a HALT instruction, the Intel486
processor issues a normal Halt bus cycle and the clock input to the Intel486 processor core
is automatically stopped, causing the processor to enter the Auto HALT Power Down state.
• Upgrade Power Down Mode — When an Intel486 processor upgrade is installed, the
Upgrade Power Down Mode detects the presence of the upgrade, powers down the core,
and three-states all outputs of the original processor, so the Intel486 processor enters a very
low current mode.
• Auto Idle Power Down — This function allows the processor to reduce the core frequency
to the bus frequency when both the core and bus are idle. Auto Idle Power Down is
software-transparent and does not affect processor performance. Auto Idle Power Down
provides an average power savings of 10% and is only applicable to clock-multiplied
processors.
Enhanced Bus Mode Features (for the Write-Back Enhanced IntelDX4 processor only):
• Write Back Internal Cache — The Write-Back Enhanced IntelDX4 processor adds write-
back support to the unified cache. The on-chip cache is configurable to be write-back or
write-through on a line-by-line basis. The internal cache implements a modified MESI
protocol, which is most applicable to single processor systems.
• Enhanced Bus Mode — The definitions of some signals have been changed to support the
new Enhanced Bus Mode (Write-Back Mode).
• Write Bursting — Data written from the processor to memory can be burst to provide zero
wait state transfers.