XC886/888CLM
Index
User’s Manual
19-5
V1.3, 2010-02
Offset addresses 6-11
Open drain control register 6-8
Normal mode 6-2, 6-8
Open drain mode 6-2, 6-8
Parallel Read 4-5
Parallel request source 16-14
Password 3-7
Peripheral clock management 8-5
Permanent arbitration 16-9
Personal computer host 4-14
P-Flash 4-2, 4-3
P-Flash bank pair 4-2
Phase-Locked Loop 7-11
Changing PLL parameters 7-13
Loss-of-Lock operation 7-12
Loss-of-Lock recovery 7-12
Pin
PLL
PLL base mode 7-14
PLL mode 7-14
Power control 2-6
Power saving modes 8-1
Power supply system 7-1
Power-down mode 7-16, 8-3
Entering power-down mode 8-3
Exiting power-down mode 8-4
Power-down wake-up reset 7-6
Power-on reset 7-2, 7-3
Prescaler mode 7-14
Prewarning period 9-2
Processor architecture 2-1
Instruction timing
Program control 2-1
Program counter 2-3
Program Flash 4-2, 4-3
Program memory 3-4
Program status word 2-4
Pull-down device 6-8
Pull-up device 6-8
Pulse width modulation 14-1
R
Read access time 4-1
Read-out protection 3-6
Request gating 16-13
Request trigger 16-13, 16-15, 16-16, 16-27
ROM devices 3-1, 3-2
ROM program memory 3-1
RS-232 4-14
S
Sample phase 16-5
Schmitt-Trigger 6-2, 6-3
Sectorization 4-3
Sequential request source 16-11
Serial interfaces 12-1–12-30
Shift operation 10-3
Slow-down mode 7-16, 8-2
Software breakpoints 17-5
Source priority 16-9
Special Function Register area 3-1
Stack pointer 2-3
Synchronization phase 16-5
Synchronous serial interface 12-31
Baud rate generation 12-39
Continuous transfer operation 12-37
Data width 12-33
Error detection 12-41
Baud rate error 12-42
Phase error 12-42
Receive error 12-41
Transmit error 12-42
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Содержание XC886CLM
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