GE Power Management
LPS-D Line Protection System
E-
1
APPENDIX E
E.1 TABLES AND FIGURES
E
APPENDIX E TABLES AND FIGURESE.1 TABLES AND FIGURES
E.1.1 LIST OF FIGURES
F
IGURE
1–1: GROUND DISTANCE QUADRILATERAL CHARACTERISTIC............................................1-6
F
IGURE
1–2: TENT CHARACTERISTIC ....................................................................................................1-8
F
IGURE
1–3: POTENTIAL FUSE FAILURE LOGIC DIAGRAMS .............................................................1-13
F
IGURE
1–4: LINE PICKUP LOGIC DIAGRAM ........................................................................................1-14
F
IGURE
1–5: REMOTE-OPEN DETECTOR LOGIC.................................................................................1-15
F
IGURE
1–6: OSB R-X DIAGRAM............................................................................................................1-17
F
IGURE
1–7: OSB LOGIC DIAGRAMS ....................................................................................................1-17
F
IGURE
1–8: SWITCH SELECTION OF ACTIVE SETTING GROUP ......................................................1-20
F
IGURE
1–9: STEP DISTANCE LOGIC DIAGRAM..................................................................................1-27
F
IGURE
1–10: PUTT/POTT INTERCONNECTION DIAGRAM WITH NS40A ..........................................1-28
F
IGURE
1–11: PUTT LOGIC DIAGRAM ...................................................................................................1-29
F
IGURE
1–12: PERMISSIVE OVERREACH TRANSFER TRIP (POTT1) ................................................1-31
F
IGURE
1–13: POTT WITH BLOCKING FUNCTIONS (POTT2) LOGIC DIAGRAM ................................1-32
F
IGURE
1–14: BLOCKING SCHEME LOGIC DIAGRAM .........................................................................1-34
F
IGURE
1–15: BLOCKING SCHEME INTERCONNECTION WITH CS28A.............................................1-35
F
IGURE
1–16: HYBRID SCHEME INTERCONNECTION WITH CS61C..................................................1-36
F
IGURE
1–17: HYBRID LOGIC DIAGRAM...............................................................................................1-37
F
IGURE
1–18: SINGLE-PHASE TRIPPING LOGIC (EXCEPT FOR HYBRID SCHEME) ........................1-39
F
IGURE
1–19: SINGLE PHASE TRIPPING LOGIC (HYBRID SCHEME) ................................................1-40
F
IGURE
1–20: OPEN POLE DETECTION LOGIC....................................................................................1-41
F
IGURE
1–21: THREE POLE TRIP ENABLE OUTPUT ...........................................................................1-45
F
IGURE
1–22: ELEMENTARY DIAGRAM WITH DEFAULT I/O ASSIGNMENTS....................................1-47
F
IGURE
1–23: ELEMENTARY DIAGRAM ................................................................................................1-48
F
IGURE
2–1: TRIP CIRCUIT MONITOR.....................................................................................................2-4
F
IGURE
2–2: ALLOWABLE ZONE 1 REACH (WHEN USED WITH CVTS).............................................2-11
F
IGURE
2–3: TENT CHARACTERISTIC ..................................................................................................2-12
F
IGURE
2–4: MAXIMUM ALLOWABLE REACH.......................................................................................2-13
F
IGURE
2–5: OPERATING TIME CHARACTERISTIC .............................................................................2-14
F
IGURE
2–6: GROUND DISTANCE FUNCTION CHARACTERISTIC .....................................................2-18
F
IGURE
2–7: R-X DIAGRAM FOR ZONE 4 DISTANCE FUNCTIONS.....................................................2-19
F
IGURE
2–8: ZONE 4 FAULT EXAMPLE .................................................................................................2-19
F
IGURE
2–9: NT/NB FUNCTIONS............................................................................................................2-26
F
IGURE
2–10: FUSEFAIL FUNCTION LOGIC DIAGRAM........................................................................2-30
F
IGURE
2–11: LINE PICKUP FUNCTIONAL LOGIC................................................................................2-32
F
IGURE
2–12: ROD LOGIC DIAGRAM ....................................................................................................2-33
F
IGURE
2–13: TL5PICKUP / TL6PICKUP REPRESENTATION ..............................................................2-37
F
IGURE
2–14: OSB FUNCTION CHARACTERISTIC...............................................................................2-41
F
IGURE
2–15: INVERSE CURVE .............................................................................................................2-49
F
IGURE
2–16: VERY INVERSE CURVE ..................................................................................................2-50
F
IGURE
2–17: EXTREMELY INVERSE CURVE ......................................................................................2-51
F
IGURE
3–1: DIMENSIONS .......................................................................................................................3-1
F
IGURE
3–2: FRONT AND REAR VIEW ....................................................................................................3-2
F
IGURE
3–3: CIRCUIT BOARD LOCATIONS ............................................................................................3-3
F
IGURE
3–4: LPS-D SYSTEM BLOCK DIAGRAM .....................................................................................3-4
F
IGURE
3–5: INPUT BOARD DIAGRAM ....................................................................................................3-7
F
IGURE
3–6: BLOCK DIAGRAM OF THE MAGNETICS MODULE ...........................................................3-8
F
IGURE
3–7: BLOCK DIAGRAM OF THE COMMUNICATIONS MODULE ...............................................3-9
F
IGURE
3–8: BLOCK DIAGRAM OF THE DIGITAL OUPUT / POWER SUPPLY....................................3-10
F
IGURE
3–9: BLOCK DIAGRAM OF THE DSP / COMM / LUI MODULE ................................................3-11
F
IGURE
3–10: BLOCK DIAGRAM OF THE SYSTEM PROCESSOR (
I
960 CPU)....................................3-13
F
IGURE
4–1: DIGITAL OUTPUT TEST CONNECTIONS.........................................................................4-11
F
IGURE
4–2: CONFIGURABLE INPUT/OUTPUT TEST CONNECTIONS...............................................4-13
Содержание LPS-D
Страница 2: ......
Страница 4: ......
Страница 164: ...3 14 LPS D Line Protection System GE Power Management 3 3 PRINTED CIRCUIT BOARD MODULES 3 HARDWARE DESCRIPTION 3 ...
Страница 226: ...7 4 LPS D Line Protection System GE Power Management 7 1 RATINGS 7 SPECIFICATIONS 7 ...
Страница 284: ...10 20 LPS D Line Protection System GE Power Management 10 8 HELP MENU 10 ALPS TEST PROGRAM 10 ...
Страница 334: ...A 4 LPS D Line Protection System GE Power Management A 1 FREQUENTLY ASKED QUESTIONS APPENDIXA A ...
Страница 412: ...C 34 LPS D Line Protection System GE Power Management C 3 POINT LISTS APPENDIXC C ...
Страница 416: ...D 4 LPS D Line Protection System GE Power Management D 1 KEYPAD MENUS APPENDIXD D ...
Страница 422: ...F 2 LPS D Line Protection System GE Power Management F 1 WARRANTY INFORMATION APPENDIXF F ...
Страница 435: ...GE Power Management LPS D Line Protection System xiii INDEX INDEX tests 6 11 ZONE TIMER functional tests 5 10 ...
Страница 436: ...xiv LPS D Line Protection System GE Power Management INDEX INDEX ...