Texas Instruments TMS320 2806 Series, Technical Reference Manual

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6.7.2 ECAP_REGS Registers
Table 6-2 lists the ECAP_REGS registers. All register offset addresses not listed in Table 6-2 should be
considered as reserved locations and the register contents should not be modified.
Table 6-2. ECAP_REGS Registers
Offset Acronym Register Name Write Protection Section
0h TSCTR Time-Stamp Counter Go
2h CTRPHS Counter Phase Offset Value Register Go
4h CAP1 Capture 1 Register Go
6h CAP2 Capture 2 Register Go
8h CAP3 Capture 3 Register Go
Ah CAP4 Capture 4 Register Go
14h ECCTL1 Capture Control Register 1 Go
15h ECCTL2 Capture Control Register 2 Go
16h ECEINT Capture Interrupt Enable Register Go
17h ECFLG Capture Interrupt Flag Register Go
18h ECCLR Capture Interrupt Clear Register Go
19h ECFRC Capture Interrupt Force Register Go
Complex bit access types are encoded to fit into small table cells. Table 6-3 shows the codes that are used for
access types in this section.
Table 6-3. ECAP_REGS Access Type Codes
Access Type Code Description
Read Type
R R Read
R-0 R
-0 Read
Returns 0s
Write Type
W W Write
W1C W
1C Write
1 to clear
W1S W
1S Write
1 to set
Reset or Default Value
- n Value after reset or the default
value
Register Array Variables
i,j,k,l,m,n When these variables are used in
a register name, an offset, or an
address, they refer to the value of
a register array where the register
is part of a group of repeating
registers. The register groups
form a hierarchical structure and
the array is represented with a
formula.
y When this variable is used in a
register name, an offset, or an
address it refers to the value of
a register array.
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SPRUH18I – JANUARY 2011 – REVISED JUNE 2022
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