Rev.6.00 Oct.28.2004 page 448
of 1016
REJ09B0138-0600H
12.6
Usage Notes
Application programmers should note that the following kinds of contention can occur in the 8-bit timer.
12.6.1
Contention between TCNT Write and Clear
If a timer counter clock pulse is generated during the T
2
state of a TCNT write cycle, the clear takes priority, so that the
counter is cleared and the write is not performed.
Figure 12-10 shows this operation.
ø
Address
TCNT address
Internal write signal
Counter clear signal
TCNT
N
H'00
T
1
T
2
TCNT write cycle by CPU
Figure 12-10 Contention between TCNT Write and Clear
Summary of Contents for ZTAT H8S/2357F
Page 4: ......
Page 28: ...Rev 6 00 Oct 28 2004 page xxiv of xxiv REJ09B0138 0600H...
Page 82: ...Rev 6 00 Oct 28 2004 page 54 of 1016 REJ09B0138 0600H...
Page 108: ...Rev 6 00 Oct 28 2004 page 80 of 1016 REJ09B0138 0600H...
Page 364: ...Rev 6 00 Oct 28 2004 page 336 of 1016 REJ09B0138 0600H...
Page 438: ...Rev 6 00 Oct 28 2004 page 410 of 1016 REJ09B0138 0600H...
Page 566: ...Rev 6 00 Oct 28 2004 page 538 of 1016 REJ09B0138 0600H...
Page 588: ...Rev 6 00 Oct 28 2004 page 560 of 1016 REJ09B0138 0600H...
Page 688: ...Rev 6 00 Oct 28 2004 page 660 of 1016 REJ09B0138 0600H...
Page 694: ...Rev 6 00 Oct 28 2004 page 666 of 1016 REJ09B0138 0600H...
Page 708: ...Rev 6 00 Oct 28 2004 page 680 of 1016 REJ09B0138 0600H...
Page 1044: ...Rev 6 00 Oct 28 2004 page 1016 of 1016 REJ09B0138 0600H...
