Renesas ZTAT H8S/2357F, Hardware Manual

Page: 713 / 1047

Rev.6.00 Oct.28.2004 page 685 of 1016
REJ09B0138-0600H
(1) Clock Timing
Table 22-4 lists the clock timing
Table 22-4 Clock Timing
Conditions: V
CC
= 5.0 V
±
10%, AV
CC
= 5.0 V
±
10%, V
ref
= 4.5 V to AV
CC
,
V
SS
= AV
SS
= 0 V, ø = 10 to 20 MHz, T
a
= –20 to +75
°
C (regular specifications),
T
a
= –40 to +85
°
C (wide-range specifications)
Condition
Test
Item Symbol Min Max Unit Conditions
Clock cycle time t
cyc
50 100 ns Figure 22-4
Clock high pulse width t
CH
20 — ns
Clock low pulse width t
CL
20 — ns
Clock rise time t
Cr
— 5 ns
Clock fall time t
Cf
— 5 ns
Clock oscillator setting
time at reset (crystal) t
OSC1
10 — ms Figure 22-5
Clock oscillator setting time
in software standby (crystal) t
OSC2
10 — ms Figure 21-2
External clock output stabilization
delay time t
DEXT
500 —
µ
s Figure 22-5
t
CH
t
Cf
t
cyc
t
CL
t
Cr
ø
Figure 22-4 System Clock Timing