Renesas ZTAT H8S/2357F, Hardware Manual

Page: 154 / 1047

Rev.6.00 Oct.28.2004 page 126 of 1016
REJ09B0138-0600H
16-Bit Access Space: Figure 6-5 illustrates data alignment control for the 16-bit access space. With the 16-bit access
space, the upper data bus (D
15
to D
8
) and lower data bus (D
7
to D
0
) are used for accesses. The amount of data that can be
accessed at one time is one byte or one word, and a longword transfer instruction is executed as two word transfer
instructions.
In byte access, whether the upper or lower data bus is used is determined by whether the address is even or odd. The
upper data bus is used for an even address, and the lower data bus for an odd address.
D
15
D
8
D
7
D
0
Upper data bus
Byte size
Word size
1st bus cycle
2nd bus cycle
Longword
size
• Even address
Byte size • Odd address
Lower data bus
Figure 6-5 Access Sizes and Data Alignment Control (16-Bit Access Space)