Renesas ZTAT H8S/2357F, Hardware Manual

Page: 646 / 1047

Rev.6.00 Oct.28.2004 page 618 of 1016
REJ09B0138-0600H
Flash memory access disabled period
(x: Wait time after SWE setting)
Flash memory reprogammable period
(Flash memory program execution and data read, other than verify, are disabled.)
In transition to the boot mode and transition from the boot mode to another mode,
mode switching via RES input is necessary.
During this switching period (period during which a low level is input to the RES pin),
the state of the address dual port and bus control output signals (AS,RD,WR) changes.
Therefore, do not use these pins as output signals during this switching period.
When making a transition from the boot mode to another mode, the mode programming
setup time t
MDS
(min)= 200 ns relative to the RES clear timing is necessary.
See section 22.7.6, Flash Memory Characteristics.
Notes: 1.
2.
3.
φ
V
CC
FWE
t
OSC1
min 0
µ
s
t
MDS
t
MDS
t
MDS
t
RESW
MD
2
to MD
0
RES
SWE bit
Mode switching
*
1 Mode
switching
*
1
Boot mode
User
mode User
mode User program mode
User
program
mode
SWE set
SWE clear
Programming and
erase possible Wait time: x
Programming
and
erase
possible
Programming
and
erase
possible Wait time: x
Programming and
erase possible
Wait
time: x Wait
time: x
*
2
*
3
Figure 19-35 Mode Transition Timing
(Example: Boot mode
→
User mode
↔
User program mode)