Renesas ZTAT H8S/2357F, Hardware Manual

Page: 111 / 1047

Rev.6.00 Oct.28.2004 page 83 of 1016
REJ09B0138-0600H
5.1.4 Register Configuration
Table 5-2 summarizes the registers of the interrupt controller.
Table 5-2 Interrupt Controller Registers
Name Abbreviation R/W Initial Value Address *
1
System control register SYSCR R/W H'01 H'FF39
IRQ sense control register H ISCRH R/W H'00 H'FF2C
IRQ sense control register L ISCRL R/W H'00 H'FF2D
IRQ enable register IER R/W H'00 H'FF2E
IRQ status register ISR R/(W) *
2
H'00 H'FF2F
Interrupt priority register A IPRA R/W H'77 H'FEC4
Interrupt priority register B IPRB R/W H'77 H'FEC5
Interrupt priority register C IPRC R/W H'77 H'FEC6
Interrupt priority register D IPRD R/W H'77 H'FEC7
Interrupt priority register E IPRE R/W H'77 H'FEC8
Interrupt priority register F IPRF R/W H'77 H'FEC9
Interrupt priority register G IPRG R/W H'77 H'FECA
Interrupt priority register H IPRH R/W H'77 H'FECB
Interrupt priority register I IPRI R/W H'77 H'FECC
Interrupt priority register J IPRJ R/W H'77 H'FECD
Interrupt priority register K IPRK R/W H'77 H'FECE
Notes: 1. Lower 16 bits of the address.
2. Can only be written with 0 for flag clearing.
5.2 Register Descriptions
5.2.1 System Control Register (SYSCR)
Bit : 7 6 5 4 3 2 1 0
— — INTM1 INTM0 NMIEG — — RAME
Initial value : 0 0 0 0 0 0 0 1
R/W : R/W — R/W R/W R/W — * R/W R/W
Note: * R/W in the H8S/2390, H8S/2392, H8S/2394, and H8S/2398.
SYSCR is an 8-bit readable/writable register that selects the interrupt control mode, and the detected edge for NMI.
Only bits 5 to 3 are described here; for details of the other bits, see section 3.2.2, System Control Register (SYSCR).
SYSCR is initialized to H'01 by a reset and in hardware standby mode. It is not initialized in software standby mode.