Renesas ZTAT H8S/2357F, Hardware Manual

Page: 938 / 1047

Rev.6.00 Oct.28.2004 page 910 of 1016
REJ09B0138-0600H
PDPCR—Port D MOS Pull-Up Control Register H'FF73 Port D
[On-chip ROM version Only]
7
PD7PCR
0
R/W
6
PD6PCR
0
R/W
5
PD5PCR
0
R/W
4
PD4PCR
0
R/W
3
PD3PCR
0
R/W
0
PD0PCR
0
R/W
2
PD2PCR
0
R/W
1
PD1PCR
0
R/W
Controls the MOS input pull-up function incorporated into port D on a bit-by-bit basis
Bit
Initial value
Read/Write
:
:
:
Note: Setting is prohibited in the H8S/2352, H8S/2394, H8S/2392, and H8S/2390.
PEPCR—Port E MOS Pull-Up Control Register H'FF74 Port E
[On-chip ROM version Only]
7
PE7PCR
0
R/W
6
PE6PCR
0
R/W
5
PE5PCR
0
R/W
4
PE4PCR
0
R/W
3
PE3PCR
0
R/W
0
PE0PCR
0
R/W
2
PE2PCR
0
R/W
1
PE1PCR
0
R/W
Controls the MOS input pull-up function incorporated into port E on a bit-by-bit basis
Bit
Initial value
Read/Write
:
:
:
Note: Setting is prohibited in the H8S/2352, H8S/2394, H8S/2392, and H8S/2390.
P3ODR—Port 3 Open Drain Control Register H'FF76 Port 3
7
—
Undefined
—
6
—
Undefined
—
5
P35ODR
0
R/W
4
P34ODR
0
R/W
3
P33ODR
0
R/W
0
P30ODR
0
R/W
2
P32ODR
0
R/W
1
P31ODR
0
R/W
Controls the PMOS on/off status for each port 3 pin (P3
5
to P3
0
)
Bit
Initial value
Read/Write
:
:
:
PAODR—Port A Open Drain Control Register H'FF77 Port A
[On-chip ROM version Only]
7
PA7ODR
0
R/W
6
PA6ODR
0
R/W
5
PA5ODR
0
R/W
4
PA4ODR
0
R/W
3
PA3ODR
0
R/W
0
PA0ODR
0
R/W
2
PA2ODR
0
R/W
1
PA1ODR
0
R/W
Controls the PMOS on/off status for each port A pin (PA
7
to PA
0
)
Bit
Initial value
Read/Write
:
:
:
Note: Setting is prohibited in the H8S/2352, H8S/2394, H8S/2392, and H8S/2390.