Renesas ZTAT H8S/2357F, Hardware Manual

Page: 552 / 1047

Rev.6.00 Oct.28.2004 page 524 of 1016
REJ09B0138-0600H
15.3 Operation
15.3.1 Overview
The main functions of the Smart Card interface are as follows.
• One frame consists of 8-bit data plus a parity bit.
• In transmission, a guard time of at least 2 etu (Elementary Time Unit: the time for transfer of 1 bit) is left between the
end of the parity bit and the start of the next frame.
• If a parity error is detected during reception, a low error signal level is output for one etu period, 10.5 etu after the start
bit.
• If the error signal is sampled during transmission, the same data is transmitted automatically after the elapse of 2 etu or
longer.
• Only asynchronous communication is supported; there is no clocked synchronous communication function.
15.3.2 Pin Connections
Figure 15-2 shows a schematic diagram of Smart Card interface related pin connections.
In communication with an IC card, since both transmission and reception are carried out on a single data transmission line,
the TxD pin and RxD pin should be connected with the LSI pin. The data transmission line should be pulled up to the V
CC
power supply with a resistor.
When the clock generated on the Smart Card interface is used by an IC card, the SCK pin output is input to the CLK pin
of the IC card. No connection is needed if the IC card uses an internal clock.
LSI port output is used as the reset signal.
Other pins must normally be connected to the power supply or ground.
TxD
RxD
SCK
Rx (port)
H8S/2357 Group
I/O
CLK
RST
V
CC
Connected equipment
IC card
Data line
Clock line
Reset line
Figure 15-2 Schematic Diagram of Smart Card Interface Pin Connections
Note: If an IC card is not connected, and the TE and RE bits are both set to 1, closed transmission/reception is possible,
enabling self-diagnosis to be carried out.