Ameba-D User Manual
User Manual All information provided in this document is subject to legal disclaimers. © REALTEK 2019. All rights reserved.
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When the ACAL_CNT[5:0] value equals to the ACAL_THES[5:0], the xtal_req_32k is generated and the SDM32K calibration circuit works
automatically.
11.2.3
Programmable Alarm
The RTC unit provides one programmable alarm.
The programmable alarm function is enabled through the ALME bit in the RTC_CR register. The ALMF is set to 1 if the calendar seconds,
minutes, hours or days match the values programmed in the alarm registers RTC_ALMR1L and RTL_ALMR1H. Each calendar field can be
independently selected through the MSK
x
bits. The alarm interrupt is enabled through the ALMIE bit in the RTC_CR register.
Alarm (if enabled by the OSEL[1:0] bits in RTC_CR) can be routed to the RTC_OUT output. The alarm output is a pulse which width is 1/RTCCLK.
11.2.4
Write Protection
After RTC domain reset, all the RTC registers are write-protected. Writing to the RTC registers is enabled by writing a key into the RTC_WPR
register.
The following steps are required to unlock the write protection on all the RTC registers except for ALMF in RTC_ISR.
(1)
Write ‘0xCA’ into the RTC_WPR register.
(2)
Write ‘0x53’ into the RTC_WPR register.
Writing a wrong key reactivates the write protection. The protection mechanism isn’t affected by system reset.
11.2.5
Digital Calibration
The digital calibration can be used to compensate RTCCLK by adding (positive calibration) or masking (negative calibration) clock cycles at the
output of the asynchronous prescaler (clk_apre).
Positive and negative calibrations are selected by setting the DCS bit to ‘0’ and ‘1’ in RTC_CALIBR register, respectively.
When positive calibration is enabled (DCS = ‘0’), DC clk_apre cycle is added every (CALP+1) minutes. This causes the calendar to be
updated sooner, thereby adjusting the effective RTC frequency to be a bit higher.
When negative calibration is enabled (DCS = ‘1’), DC clk_apre cycle is removed every (CALP +1) minutes. This causes the calendar to be
updated later, thereby adjusting the effective RTC frequency to be a bit lower.
DC and CALP can be configured through the RTC_CALIBR register. DC must be less than PREDIV_S in the RTC_PRER register.
The calibration parameter can be configured on-the-fly. Calibrating resolution is determined by the frequency of clk_apre and the calibration
period. The example is shown in Table 11-1.
Table 11-1 Example of calibrating resolution
CALP
clk_apre (128Hz)
clk_apre (256Hz)
clk_apre (512Hz)
1 min
130.2ppm
65.1ppm
32.55ppm
2 min
65.1ppm
32.55ppm
16.27ppm
4 min
32.55ppm
16.27ppm
8.14ppm
8 min
16.27ppm
8.14ppm
4.07ppm
Re-calibration on-the-fly:
The calibration register (RTC_CALIBR) can be updated on the fly while INITF=0, by using the following steps:
(1)
Poll the RECALPF (re-calibration pending flag).
(2)
If RECALPF is set to 0, write a new value to RTC_CALIBR if necessary, RECALPF is then automatically set to 1.
(3)
Within three clk_apre cycles after the write operation to RTC_CALIBR, the new calibration settings take effect.
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