Ameba-D User Manual
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104
Fig 9-17 Breakdown of Block Transfer
The channel FIFO is alternatively filled by a burst from the source and emptied by a burst to the destination until the block transfer has
completed, as shown in Fig 9-18.
Fig 9-18 Channel FIFO contents at times indicated in Fig 9-17
Burst transactions are completed in one burst. Additionally, because (8) and (9) are both true, neither the source or destination peripherals
enter their Single Transaction Region at any stage throughout the DMA transfer, and the block transfer from the source and to the destination
consists of burst transactions only.
9.2.8.1.2
Example 2
Scenario
: Effect of DMAH_CH
x
_FIFO_DEPTH on block transfers.
In this example, the coreConsultant DMAH_CH
x
_FIFO_DEPTH parameter is changed to 8 bytes, and all other parameters are left unchanged
from Example 1, Table 9-5
Example 1 shows the source and destination burst transactions completing in a single burst. In general, a burst transaction may take multiple
bursts to complete. With the DMAH_CH
x
_FIFO_DEPTH parameter set to 8 bytes instead of 16 bytes, the block transfer would look like that
shown in Fig 9-19.
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2019-05-15 10:08:03