Ameba-D User Manual
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9.2.10.1
Transmit Watermark Level and Transmit FIFO Underflow
During SSI serial transfers, SSI transmit FIFO requests are made to the DMAC whenever the number of entries in the SSI transmit FIFO is less
than or equal to the SSI Transmit Data Level Register (SSI.DMATDLR) value. This is known as the watermark level. The DMAC responds by
writing a burst of data to the SSI transmit FIFO buffer, of length DMA.CTL
x
.DEST_MSIZE.
Data should be fetched from the DMAC often enough for the SSI transmit FIFO to continuously perform serial transfers; that is, when the SSI
transmit FIFO begins to empty, another burst transaction request should be triggered. Otherwise the SSI transmit FIFO runs out of data
(underflow). To prevent this condition, the user must set the watermark level correctly.
9.2.10.2
Choosing the Transmit Watermark Level
Consider an example with the following assumption:
DMA.CTL
x
.DEST_MSIZE = SSI_TX_FIFO_DEPTH - SSI.DMATDLR
Note
: SSI_TX_FIFO_DEPTH is the SSI transmit FIFO depth. SSI.DMATDLR controls the level at which a DMAC destination burst request is made
by the SSI transmit logic. It is equal to the watermark level; that is, a destination burst request is generated (active-edge of dma_req triggered)
when the number of valid data entries in the SSI transmit FIFO is equal to or below this field value.
In this situation, the number of data items to be transferred in a DMAC burst is equal to the empty space in the SSI transmit FIFO. Consider two
different watermark level settings.
9.2.10.2.1
Case 1: SSI.DMATDLR = 2
Fig 9-39 illustrates the watermark levels in Case 1 where SSI.DMATDLR = 2.
Fig 9-39 Case 1 watermark levels where SSI.DMATDLR = 2
Case 1 uses the parameters listed in Table 9-12.
Table 9-12 Transmit watermark level – Case 1
Parameter
Description
SSI.DMATDLR = 2
SSI transmit FIFO watermark level
DMA.CTL
x
.DEST_MSIZE = SSI_TX_FIFO_DEPTH - SSI.DMATDLR = 6
DMA.CTL
x
.DEST_MSIZE is equal to the empty space in the transmit
FIFO at the time the burst request is made.
SSI_TX_FIFO_DEPTH = 8
SSI transmit FIFO depth
DMA.CTL
x
.BLOCK_TS = 30
Block size
The number of burst transactions that are needed equals the block size divided by the number of data items per burst:
DMA.CTL
x
.BLOCK_TS/DMA.CTL
x
.DEST_MSIZE = 30/6 = 5
The number of burst transactions in the DMAC block transfer is 5, but the watermark level, SSI.DMATDLR, is quite low. Therefore, the
probability of an SSI underflow is high where the SSI serial transmit line needs to transmit data, but where there is no data left in the transmit
FIFO. This occurs because the DMAC has not had time to service the DMAC request before the SSI transmit FIFO becomes empty.
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