Universal Asynchronous Receiver/Transmitter (UART)
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297
But it doesn’t clear the shift register, that is receiving of the current character
continues.
Writing 1 to this bit is self-clearing.
0
RPT_ERR
R/W
1
Enable or disable the report of Error in RCVR FIFO field in LSR bit [7]
0: Disable
1: Enable
14.3
Design Implementation
14.3.1
Baud Rate Calculation
Baud rate calculation of Tx path and Rx path is shown as follows:
Average BaudRate =
𝑐𝑙𝑜𝑐𝑘_𝑓𝑟𝑒𝑞
(𝑜𝑣𝑠𝑟[19: 0] +
𝑜𝑣𝑠𝑟_𝑎𝑑𝑗[0] + 𝑜𝑣𝑠𝑟_𝑎𝑑𝑗[1] + ⋯ + 𝑜𝑣𝑠𝑟_𝑎𝑑𝑗[10]
11
)
Tx path and Rx path both support fractional baud rate generator. Parameter ovsr[19:0] and ovsr_adj[i] are configured depending on IP clock
frequency and used baud rate.
Total baud rate error shall be less than 3% in order to communicate correctly. Total baud rate error
∆E
includes three parts:
∆E = E1 + E2 + E3
where
E1 is the error of real baud rate of Tx device and expected communicate baud rate.
E2 is the frequency drift of Rx IP clock.
E3 is the calculation baud error of Rx device.
For Rx device, E1 and E2 can be both decreased by monitoring baud rate of Rx data, and E3 can be decreased by using fractional baud rate
generator.
If maximum sum of E1 and E2 is small (less than 2%), Rx path with XTAL 40MHz clock can be selected, and it can support higher baud rate.
If maximum sum of E1 and E2 is large (2%~4%), Rx path with OSC 2MHz clock shall be selected, baud rate that it supports is limited, while
it can achieve low power by using OSC clock (±3%).
Table 14-2 gives the supported frequently-used baud rate. For Rx path with 2M clock, E3 shall be less than 3%, so minimum value of ovsr[19:0]
is 0.5/3%=16, then maximum supported baud rate is 2MHz/16=125000bps, 0.5 is maximum sample deviation from the middle of one bit.
Table 14-2 Supported baud rate of Tx path & Rx path
Item
Tx/Rx Path (High Speed Mode)
Rx Path (Low Power Mode)
Clock select
40MHz XTAL
XTAL 2MHz/OSC 2MHz(+/-3%)
Supported baud rate (bps)
110, 300, 600, 1200, 9600, 14400, 19200, 28800, 38400, 57600, 76800,
115200, 128000, 153600, 230400, 406800, 500000, 921600, 1000000,
1382400, 1444400, 1500000, 1843200, 2000000, 2100000, 2764800,
3000000, 3250000, 3692300, 3750000, 4000000, 6000000
110, 300, 600, 1200, 9600,
14400, 19200, 28800, 38400,
57600, 76800, 115200
Table 14-3 lists the error rate of different baud rates when IP clock is 40MHz XTAL, the maximum error rate doesn’t exceed 0.5%.
Table 14-3 Error rate of baud rate
IP Clock
Theory Baud Rate
Real Baud Rate
Error Rate (%)
4
40MHz XTAL
110
110
0
300
300
0
600
600
0
1200
1200
0
2400
2400
0
4800
4800
0
4
The calculation of error rate retains four decimal places.
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2019-05-15 10:08:03
