Hitachi SH7709S, Hardware Manual

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Table 23.5 Clock Timing (3)
(VccQ = 3.3 ± 0.3 V, Vcc = 1.55 to 2.15 V, AVcc = 3.3 ± 0.3 V, Ta = –20 to 75°C,
Maximum External Bus Operating Frequency: 66 MHz)
Item Symbol Min Max Unit Figure
EXTAL clock input frequency f
EX
6.25 66 MHz 23.1
EXTAL clock input cycle time t
EXcyc
15.2 160 ns
EXTAL clock input low pulse width t
EXL
4 — ns
EXTAL clock input high pulse width t
EXH
4 — ns
EXTAL clock input rise time t
EXR
— 2 ns
EXTAL clock input fall time t
EXF
— 2 ns
CKIO clock input frequency f
CKI
20 66 MHz 23.2
CKIO clock input cycle time t
CKIcyc
15.2 40 ns
CKIO clock input low pulse width t
CKIL
4 — ns
CKIO clock input high pulse width t
CKIH
4 — ns
CKIO clock input rise time t
CKIR
— 2 ns
CKIO clock input fall time t
CKIF
— 2 ns
CKIO clock output frequency f
OP
25 66 MHz 23.3
CKIO clock output cycle time t
cyc
15.2 40 ns
CKIO clock output low pulse width t
CKOL
3 — ns
CKIO clock output high pulse width t
CKOH
3 — ns
CKIO clock output rise time t
CKOR
— 5 ns
CKIO clock output fall time t
CKOF
— 5 ns
CKIO2 clock output delay time t
CK2D
–3 3 ns
CKIO2 clock output rise time t
CK20R
— 7 ns
CKIO2 clock output fall time t
CK20F
— 7 ns
Power-on oscillation settling time t
OSC1
10 — ms 23.4
RESETP
setup time t
RESPS
20 — ns 23.4, 23.5
RESETM
setup time t
RESMS
6 — ns
RESETP
assert time t
RESPW
20 — t
cyc
RESETM
assert time t
RESMW
20 — t
cyc