532
Table 16.3
SCSMR Settings
SCSMR Settings
n
Clock Source
CKS1
CKS0
0
P
φ
0
0
1
P
φ
/4
0
1
2
P
φ
/16
1
0
3
P
φ
/64
1
1
Note:
The bit rate error is given by the following formula:
Error (%) =
Pø
×
10
6
– 1
×
100
(N+1)
×
64
×
2
2n–1
×
B
Table 16.4 lists examples of SCBRR settings.
Table 16.4
Bit Rates and SCBRR Settings
P
φ
(MHz)
2
2.097152
2.4576
Bit Rate (bits/s) n
N
Error (
%
) n
N
Error (
%
) n
N
Error (
%
)
110
1
141
0.03
1
148
–0.04
1
174
–0.26
150
1
103
0.16
1
108
0.21
1
127
0.00
300
0
207
0.16
0
217
0.21
0
255
0.00
600
0
103
0.16
0
108
0.21
0
127
0.00
1200
0
51
0.16
0
54
–0.70
0
63
0.00
2400
0
25
0.16
0
26
1.14
0
31
0.00
4800
0
12
0.16
0
13
–2.48
0
15
0.00
9600
0
6
–6.99
0
6
–2.48
0
7
0.00
19200
0
2
8.51
0
2
13.78
0
3
0.00
31250
0
1
0.00
0
1
4.86
0
1
22.88
38400
0
1
–18.62
0
0
–14.67
0
1
0.00
Summary of Contents for SH7709S
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