146
Bits 7 to 5—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 4—ADI Interrupt Request (ADIR): Indicates whether an ADI (ADC) interrupt request has
been generated.
B
it 4: ADIR
Description
0
ADI interrupt request not generated
(Initial value)
1
ADI interrupt request generated
Bit 3—TXI2 Interrupt Request (TXI2R): Indicates whether a TXI2 (SCIF) interrupt request has
been generated.
B
it 3: TXI2R
Description
0
TXI2 interrupt request not generated
(Initial value)
1
TXI2 interrupt request generated
Bit 2—BRI2 Interrupt Request (BRI2R): Indicates whether a BRI2 (SCIF) interrupt request has
been generated.
B
it 2: BRI2R
Description
0
BRI2 interrupt request not generated
(Initial value)
1
BRI2 interrupt request generated
Bit 1—RXI2 Interrupt Request (RXI2R): Indicates whether an RXI2 (SCIF) interrupt request
has been generated.
B
it 1: RXI2R
Description
0
RXI2 interrupt request not generated
(Initial value)
1
RXI2 interrupt request generated
Bit 0—ERI2 Interrupt Request (ERI2R): Indicates whether an ERI2 (SCIF) interrupt request
has been generated.
B
it 0: ERI2R
Description
0
ERI2 interrupt request not generated
(Initial value)
1
ERI2 interrupt request generated
Summary of Contents for SH7709S
Page 2: ...Hitachi SuperH RISC engine SH7709S Hardware Manual ADE 602 250 Rev 1 0 09 21 01 Hitachi Ltd ...
Page 75: ...56 ...
Page 107: ...88 ...
Page 125: ...106 ...
Page 139: ...120 ...
Page 203: ...184 ...
Page 245: ...226 ...
Page 411: ...392 ...
Page 609: ...590 ...
Page 635: ...616 ...
Page 663: ...644 ...
Page 679: ...660 ...