210
9.2.2
CPG Pin Configuration
Table 9.1 lists the CPG pins and their functions.
Table 9.1
CPG Pins and Functions
Pin Name
Symbol
I/O
Description
Mode control
MD0
I
Set the clock operating mode.
pins
MD1
I
MD2
I
Crystal I/O pins
XTAL
O
Connects a crystal oscillator.
(clock input pins)
EXTAL
I
Connects a crystal oscillator. Also used to input an external
clock.
Clock I/O pin
CKIO
I/O
Inputs or outputs an external clock.
Capacitor
connection pins
CAP1
I
Connects capacitor for PLL circuit 1 operation (recommended
value 470 pF).
for PLL
CAP2
I
Connects capacitor for PLL circuit 2 operation (recommended
value 470 pF).
9.2.3
CPG Register Configuration
Table 9.2 shows the CPG register configuration.
Table 9.2
CPG Register
Register Name
Abbreviation
R/W
Initial Value
Address
Access Size
Frequency control register
FRQCR
R/W
H'0102
H'FFFFFF80
16
Summary of Contents for SH7709S
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