506
Initialization
Clear TE and RE bits in SCSCR to 0
Set value in SCBRR
Clear FER/ERS, PER
and ORER flags in SCSSR to 0
Wait
Set TIE, RIE, TE, and RE bits
in SCSCR
Has a 1-bit
interval elapsed?
End
(2)
Set parity in O/
E
bit,
set clock in CKS1 and CKS0 bits,
and set C/
A
, in SCSMR
(3)
Set clock in CKE1 and CKE0 bits,
and clear TIE, RIE, TE, RE, MPIE,
and TEIE bits to 0, in SCSCR
(6)
(5)
(4)
(1)
(7)
No
Yes
Set SMIF, SDIR,
and SINV bits in SCSMR
Note: Numbers in parentheses refer to steps in the preceding procedure description.
Figure 15.5 Initialization Flowchart (Example)
Summary of Contents for SH7709S
Page 2: ...Hitachi SuperH RISC engine SH7709S Hardware Manual ADE 602 250 Rev 1 0 09 21 01 Hitachi Ltd ...
Page 75: ...56 ...
Page 107: ...88 ...
Page 125: ...106 ...
Page 139: ...120 ...
Page 203: ...184 ...
Page 245: ...226 ...
Page 411: ...392 ...
Page 609: ...590 ...
Page 635: ...616 ...
Page 663: ...644 ...
Page 679: ...660 ...