267
Table 10.10 32-Bit External Device/Little-Endian Access and Data Alignment
Data Bus
Strobe Signals
Operation
D31–D24 D23–D16 D15–D8 D7–D0
WE3
,
DQMUU
WE2
,
DQMUL
WE1
,
DQMLU
WE0
,
DQMLL
Byte
access at 0
—
—
—
Data
7–0
Asserted
Byte
access at 1
—
—
Data
7–0
—
Asserted
Byte
access at 2
—
Data 7–0 —
—
Asserted
Byte
access at 3
Data 7–0 —
—
—
Asserted
Word
access at 0
—
—
Data
15–8
Data
7–0
Asserted
Asserted
Word
access at 2
Data
15–8
Data 7–0 —
—
Asserted
Asserted
Longword
access at 0
Data
31–24
Data
23–16
Data
15–8
Data
7–0
Asserted
Asserted
Asserted
Asserted
Table 10.11 16-Bit External Device/Little-Endian Access and Data Alignment
Data Bus
Strobe Signals
Operation
D31–
D24
D23–
D16
D15–D8 D7–D0
WE3
,
DQMUU
WE2
,
DQMUL
WE1
,
DQMLU
WE0
,
DQMLL
Byte access at 0
—
—
—
Data
7–0
Asserted
Byte access at 1
—
—
Data
7–0
—
Asserted
Byte access at 2
—
—
—
Data
7–0
Asserted
Byte access at 3
—
—
Data
7–0
—
Asserted
Word access at 0
—
—
Data
15–8
Data
7–0
Asserted
Asserted
Word access at 2
—
—
Data
15–8
Data
7–0
Asserted
Asserted
Longword
access
1st
time at 0
—
—
Data
15–8
Data
7–0
Asserted
Asserted
at 0
2nd
time at 2
—
—
Data
31–24
Data
23–16
Asserted
Asserted
Summary of Contents for SH7709S
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