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Document # 001-20559 Rev. *D
Supervisory ROM (SROM)
3.1.2.3
WriteBlock Function
The WriteBlock function is used to store data in the Flash.
Data is moved 64 bytes at a time from SRAM to Flash using
this function. Before a write can be performed, either an
EraseAll or an EraseBlock must be completed successfully.
The first thing the WriteBlock function does is check the pro-
tection bits and determine if the desired BLOCKID is write-
able. If write protection is turned on, the WriteBlock function
exits, setting the accumulator and KEY2 back to 00h. KEY1
has a value of 01h, indicating a write failure. Write protection
is set when the PSoC device is programmed externally and
cannot be changed through the SSC function.
The BLOCKID of the
, where the data is stored,
must be determined and stored at SRAM address FAh. For
valid BLOCKID values, refer to
.
An MVI A, [expr] instruction is used to move data from
SRAM into Flash. Therefore, the MVI read pointer (MVR_PP
register) can be used to specify which SRAM page data is
pulled from. Using the MVI read pointer and the parameter
blocks POINTER value allows the SROM WriteBlock func-
tion to move data from any SRAM page into any Flash
block, in either Flash bank.
The SRAM address, of the first of the 64 bytes to be stored
in Flash, must be indicated using the POINTER variable in
the parameter block (SRAM address FBh).
Finally, the CLOCK and DELAY value must be set correctly.
The CLOCK value determines the length of the write
that is used to store the data in the Flash. The CLOCK and
DELAY values are dependent on the CPU speed and must
be set correctly. Refer to
for addi-
tional information.
If the PSoC device you are using has more than one bank of
Flash, the bank value in the FLS_PR1 register must be set
prior to executing the SSC instruction. Refer to
3.1.2.4
EraseBlock Function
The EraseBlock function is used to erase a block of 64 con-
tiguous bytes in Flash.
The first thing the EraseBlock function does is check the
protection bits and determine if the desired BLOCKID is
writeable. If write protection is turned on, the EraseBlock
function exits, setting the accumulator and KEY2 back to
00h. KEY1 has a value of 01h, indicating a write failure.
To set up the parameter block for the EraseBlock function,
correct key values must be stored in KEY1 and KEY2. The
block number to be erased must be stored in the BLOCKID
variable, and the CLOCK and DELAY values must be set
based on the current CPU speed. For more information on
setting the CLOCK and DELAY values,
If the PSoC device you are using has more than one bank of
Flash, the bank value in the FLS_PR1 register must be set
prior to executing the SSC instruction. Refer to
.
Table 3-7. WriteBlock Parameters (02h)
Name
Address
Type
Description
MVR_PP
0,D4h
Register
MVI read page pointer register.
KEY1
0,F8h
RAM
3Ah.
KEY2
0,F9h
RAM
Stack Pointer value+3, when SSC is
executed.
BLOCKID
0,FAh
RAM
Flash block number.
POINTER
0,FBh
RAM
First of 64 addresses in SRAM, where
the data to be stored in Flash is located
prior to calling WriteBlock.
CLOCK
0,FCh
RAM
Clock divider used to set the write pulse
width.
DELAY
0,FEh
RAM
For a CPU speed of 12 MHz, set to 56h.
FLS_PR1
1,FAh
Register
Flash bank number.
Table 3-8. EraseBlock Parameters (03h)
Name
Address
Type
Description
KEY1
0,F8h
RAM
3Ah
KEY2
0,F9h
RAM
Stack Pointer value+3, when SSC is
executed.
BLOCKID
0,FAh
RAM
Flash block number.
CLOCK
0,FCh
RAM
Clock divider used to set the erase
pulse width.
DELAY
0,FEh
RAM
For a CPU speed of 12 MHz, set to
56h.
FLS_PR1
1,FAh
Register
Flash bank number.
Summary of Contents for PSoC CY8C23533
Page 4: ...Contents Overview 4 Document 001 20559 Rev D Section G Glossary 385 Index 401 ...
Page 16: ...Contents Overview 16 Document 001 20559 Rev D ...
Page 24: ...24 Document 001 20559 Rev D Section A Overview ...
Page 30: ...30 Document 001 20559 Rev D Pin Information ...
Page 54: ...54 Document 001 20559 Rev D Supervisory ROM SROM ...
Page 60: ...60 Document 001 20559 Rev D RAM Paging ...
Page 68: ...68 Document 001 20559 Rev D Interrupt Controller ...
Page 76: ...12 Document 001 20559 Rev D General Purpose IO GPIO ...
Page 82: ...18 Document 001 20559 Rev D Internal Main Oscillator IMO ...
Page 84: ...20 Document 001 20559 Rev D Internal Low Speed Oscillator ILO ...
Page 90: ...26 Document 001 20559 Rev D External Crystal Oscillator ECO ...
Page 94: ...30 Document 001 20559 Rev D Phase Locked Loop PLL ...
Page 106: ...42 Document 001 20559 Rev D Sleep and Watchdog ...
Page 228: ...164 Document 001 20559 Rev D Section D Digital System ...
Page 234: ...170 Document 001 20559 Rev D Array Digital Interconnect ADI ...
Page 278: ...214 Document 001 20559 Rev D Digital Blocks ...
Page 296: ...232 Document 001 20559 Rev D Analog Interface ...
Page 304: ...240 Document 001 20559 Rev D Analog Array ...
Page 308: ...244 Document 001 20559 Rev D Analog Input Configuration ...
Page 312: ...248 Document 001 20559 Rev D Analog Reference ...
Page 338: ...274 Document 001 20559 Rev D Section F System Resources ...
Page 354: ...290 Document 001 20559 Rev D Multiply Accumulate MAC ...
Page 374: ...310 Document 001 20559 Rev D I2C ...
Page 400: ...336 Document 001 20559 Rev D Section G Glossary ...