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Chapter 21 Electrical Characteristics
21-8
21.5.4 External Bus Interface AC characteristics
(Tc
= 0 – 70
°
C, V
CCIO
= 3.3 V
±
0.2 V, V
CCInt
= 1.5 V
±
0.1 V, V
SS
= 0 V)
Item Symbol
Condition
Min.
Max.
Unit
SYSCLK Cycle Time
t
CYC_SYSCLK
Buffer fixed: C
L
=50 pF, 8 mA
7.5
⎯
ns
SYSCLK High Time
t
HIGH_SYSCLK
Buffer fixed: C
L
=50 pF, 8 mA
4
⎯
ns
SYSCLK Low Time
t
LOW_SYSCLK
Buffer fixed: C
L
=50 pF, 8 mA
4
⎯
ns
ADDR[19:5] Output Delay
t
VAL_ADDR2
For C
L
=150 pF, 16 mA buffer
1.5
6.5
ns
CE[7:0]
*
Output Delay
t
VAL_CE
Buffer fixed: C
L
=50 pF, 8 mA
1.5
8.5
ns
OE
*
Output Delay
t
VAL_OE
Buffer fixed: C
L
=50 pF, 8 mA
1.5
8.5
ns
SWE
*
Output Delay
t
VAL_SWE
Buffer fixed: C
L
=50 pF, 8 mA
1.5
8.5
ns
BWE[3:0]
*
Output Delay
t
VAL_BWE
Buffer fixed: C
L
=50 pF, 8 mA
1.5
8.5
ns
ACE Output Delay
t
VAL_ACE
Buffer fixed: C
L
=50 pF, 8 mA
1.5
8.5
ns
BUSSPRT
*
Output Delay
t
VAL_DQM
Buffer fixed: C
L
=50 pF, 8 mA
1.5
8.5
ns
DATA[63:0] Output Delay (H
→
L, L
→
H) t
VAL_BUS
For C
L
=50 pF, 16 mA buffer
1.5
6.5
*
1) ns
DATA[31:0] Output Delay (Hi-Z
→
Valid) t
VAL_DATA2ZV
For C
L
=50 pF, 16 mA buffer
1.5
8.5
ns
DATA[31:0] Ouput Delay (Valid
→
Hi-Z) t
VAL_DATA2VZ
For C
L
=50 pF, 16 mA buffer
1.5
8.5
ns
DATA[31:0] Input Setup Time
t
SU_DATA2
6.0
⎯
ns
DATA[31:0] Input Hold Time
t
HO_DATA2
0.5
⎯
ns
ACK
*
Output Delay (H
→
L, L
→
H)
t
VAL_ACK
Buffer fixed: C
L
=50 pF, 8 mA
1.5
8.5
ns
ACK
*
Output Delay (Hi-Z
→
Valid) t
VAL_ACKZV
Buffer fixed: C
L
=50 pF, 8 mA
1.5
8.5
ns
ACK
*
Output Delay (Valid
→
Hi-Z) t
VAL_ACKVZ
Buffer fixed: C
L
=50 pF, 8 mA
1.5
8.5
ns
ACK
*
Input Setup Time
t
SU_ACK
6.0
⎯
ns
ACK
*
Input Hold Time
t
HO_ACK
0.5
⎯
ns
*
1) When the speed of the External Bus is set to 1/3 speed, the delay becomes the GBUSCLK cycle +
6.5 ns. EBCCRn.SP of the External Bus Controller sets the speed of the External Bus.
Figure 21.5.5 Timing Diagram: External Bus Interface
t
SU_
*
t
HO_
*
outputs valid
inputs valid
t
VAL_
*
SYSCLK
OUTPUT
INPUT
t
CYC_SYSCLK
t
HIGH_SYSCL
t
LOW_SYSCL
Содержание TX49 TMPR4937
Страница 1: ...64 Bit TX System RISC TX49 Family TMPR4937 Rev 2 0 ...
Страница 4: ......
Страница 13: ...Table of Contents ix TMPR4937 Revision History 1 ...
Страница 14: ...Table of Contents x ...
Страница 15: ...Handling Precautions ...
Страница 16: ......
Страница 18: ...1 Using Toshiba Semiconductors Safely 1 2 ...
Страница 40: ...3 General Safety Precautions and Usage Considerations 3 18 ...
Страница 42: ...4 Precautions and Usage Considerations 4 2 ...
Страница 43: ...TMPR4937 2005 3 Rev 2 0 ...
Страница 44: ......
Страница 52: ...Chapter 1 Overview and Features 1 6 ...
Страница 156: ...Chapter 7 External Bus Controller 7 56 ...
Страница 491: ...Chapter 16 Removed 16 1 16 Removed ...
Страница 492: ...Chapter 16 Removed 16 2 ...
Страница 493: ...Chapter 17 Removed 17 1 17 Removed ...
Страница 494: ...Chapter 17 Removed 17 2 ...
Страница 495: ...Chapter 18 Removed 18 1 18 Removed ...
Страница 496: ...Chapter 18 Removed 18 2 ...
Страница 497: ...Chapter 19 Removed 19 1 19 Removed ...
Страница 498: ...Chapter 19 Removed 19 2 ...
Страница 506: ...Chapter 20 Extended EJTAG Interface 20 8 ...
Страница 529: ...Chapter 22 Pinout and Package Information 22 9 22 2 Package Dimensions P BGA484 3535 1 27B9 Unit mm ...
Страница 530: ...Chapter 22 Pinout and Package Information 22 10 ...
Страница 542: ...Chapter 24 Parts Number when Ordering 24 2 ...
Страница 544: ...Appendix A TX49 H3 Core Supplement A 2 ...