36.8.18. Compare/Capture Channel x
The CCx register represents the 16-, 24- or 32-bit value, CCx. The register has two functions, depending
of the mode of operation.
For capture operation, this register represents the second buffer level and access point for the CPU and
DMA.
For compare operation, this register is continuously compared to the counter value. Normally, the output
form the comparator is then used for generating waveforms.
CCx register is updated with the buffer value from their corresponding CCBUFx register when an
UPDATE condition occurs.
In addition, in match frequency operation, the CC0 register controls the counter period.
Name:
CCn
Offset:
0x44 + n*0x04 [n=0..3]
Reset:
0x00000000
Property:
Write-Synchronized, Read-Synchronized
Bit
31
30
29
28
27
26
25
24
CC[25:18]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
CC[17:10]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
CC[9:2]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
CC[1:0]
DITHER[5:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bits 31:6 – CC[25:0]: Channel x Compare/Capture Value
These bits hold the value of the Channel x compare/capture register.
Note:
When the TCC is configured as 16- or 24-bit timer/counter, the excess bits are read zero.
Note:
This bit field occupies the MSB of the register, [31:m]. m is dependent on the Resolution bit in the
Control A register (CTRLA.RESOLUTION):
CTRLA.RESOLUTION
Bits [31:m]
0x0 - NONE
31:0
0x1 - DITH4
31:4
Atmel SAM L22G / L22J / L22N [DATASHEET]
Atmel-42402E-SAM L22G / L22J / L22N_Datasheet_Complete-07/2016
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