Value
Name
Description
0x0
OFF
CLK_RTC_CNT = GCLK_RTC/1
0x1
DIV1
CLK_RTC_CNT = GCLK_RTC/1
0x2
DIV2
CLK_RTC_CNT = GCLK_RTC/2
0x3
DIV4
CLK_RTC_CNT = GCLK_RTC/4
0x4
DIV8
CLK_RTC_CNT = GCLK_RTC/8
0x5
DIV16
CLK_RTC_CNT = GCLK_RTC/16
0x6
DIV32
CLK_RTC_CNT = GCLK_RTC/32
0x7
DIV64
CLK_RTC_CNT = GCLK_RTC/64
0x8
DIV128
CLK_RTC_CNT = GCLK_RTC/128
0x9
DIV256
CLK_RTC_CNT = GCLK_RTC/256
0xA
DIV512
CLK_RTC_CNT = GCLK_RTC/512
0xB
DIV1024
CLK_RTC_CNT = GCLK_RTC/1024
0xC-0xF
-
Reserved
Bits 3:2 – MODE[1:0]: Operating Mode
This field defines the operating mode of the RTC. This bit is not synchronized.
Value
Name
Description
0x0
COUNT32
Mode 0: 32-bit counter
0x1
COUNT16
Mode 1: 16-bit counter
0x2
CLOCK
Mode 2: Clock/calendar
0x3
-
Reserved
Bit 1 – ENABLE: Enable
Due to synchronization there is delay from writing CTRLA.ENABLE until the peripheral is enabled/
disabled. The value written to CTRLA.ENABLE will read back immediately and the Enable bit in the
Synchronization Busy register (SYNCBUSY.ENABLE) will be set. SYNCBUSY.ENABLE will be cleared
when the operation is complete.
Value
Description
0
The peripheral is disabled
1
The peripheral is enabled
Bit 0 – SWRST: Software Reset
Writing a '0' to this bit has no effect.
Writing a '1' to this bit resets all registers in the RTC (except DBGCTRL) to their initial state, and the RTC
will be disabled.
Writing a '1' to CTRLA.SWRST will always take precedence, meaning that all other writes in the same
write-operation will be discarded.
Atmel SAM L22G / L22J / L22N [DATASHEET]
Atmel-42402E-SAM L22G / L22J / L22N_Datasheet_Complete-07/2016
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