Schweitzer Engineering Laboratories SEL-311L, Instruction Manual, Page: 634 / 734

S
ETTINGS
S
HEET Page 6
OF
22
FOR THE
SEL-311L R
ELAY
(APP = 87L21P)
Date
R
ELAY
S
ETTINGS
(S
ERIAL
P
ORT
C
OMMAND
SET
AND
F
RONT
P
ANEL
)
Date Code 20010625
Switch-Onto-Fault (See Figure 5.5)
(Make the following settings if preceding enable setting ESOTF = Y.)
Close enable time delay (OFF, 0.00–16000.00 cycles in 0.25-cycle steps) CLOEND =
52A enable time delay (OFF, 0.00–16000.00 cycles in 0.25-cycle steps) 52AEND =
SOTF duration (0.50–16000.00 cycles in 0.25-cycle steps) SOTFD =
POTT Trip Scheme Settings (Also Used in DCUB Trip Schemes) (See Figure 5.8)
(Make the following settings if preceding enable setting ECOMM = POTT, DCUB1, or DCUB2.)
Zone (level) 3 reverse block time delay
(0.00–16000.00 cycles in 0.25-cycle steps) Z3RBD =
Echo block time delay (OFF, 0.00–16000.00 cycles in 0.25-cycle steps) EBLKD =
Echo time delay pickup (OFF, 0.00–16000.00 cycles in 0.25-cycle steps) ETDPU =
Echo duration time delay (0.00–16000.00 cycles in 0.25-cycle steps) EDURD =
Weak-infeed enable (Y, N) EWFC =
WIF phase-to-phase undervoltage (0.0–260.0 V secondary) 27PPW =
WIF zero-sequence (3V0) overvoltage (0.0–150.0 V secondary) 59NW =
Additional DCUB Trip Scheme Settings (See Figure 5.12)
(Make the following settings if preceding enable setting ECOMM = DCUB1 or DCUB2.)
Guard present security time delay
(0.00–16000.00 cycles in 0.25-cycle steps) GARD1D =
DCUB disabling time delay (0.25–16000.00 cycles in 0.25-cycle steps) UBDURD =
DCUB duration time delay (0.00–16000.00 cycles in 0.25-cycle steps) UBEND =
DCB Trip Scheme Settings (See Figure 5.16)
(Make the following settings if preceding enable setting ECOMM = DCB.)
Zone (level) 3 reverse pickup time delay
(0.00–16000.00 cycles in 0.25-cycle steps) Z3XPU =
Zone (level) 3 reverse dropout extension
(0.00–16000.00 cycles in 0.25-cycle steps) Z3XD =
Block trip receive extension (0.00–16000.00 cycles in 0.25-cycle steps) BTXD =
Zone 2 distance short delay (0.00–60.00 cycles in 0.25-cycle steps) 21SD =
Level 2 overcurrent short delay (0.00–60.00 cycles in 0.25-cycle steps) 67SD =
Other Settings
Minimum trip duration time (4.00–16000.00 cycles in 0.25-cycle steps)
(see Figure 5.4) TDURD =
Close failure time delay (OFF, 0.00–16000.00 cycles in 0.25-cycle steps)
(see Figure 6.1) CFD =