Renesas H8/38024 Series, Hardware Manual

Page: 185 / 661

Rev. 6.00, 08/04, page 155 of 628
6.5.4 Register Configuration
Table 6.5 lists the register configuration to control the flash memory when the built in flash
memory is effective.
Table 6.5 Register Configuration
Register Name Abbreviation R/W Initial Value Address
Flash memory control register 1 FLMCR1 R/W H'00 H'F020
Flash memory control register 2 FLMCR2 R H'00 H'F021
Flash memory power control register FLPWCR R/W H'00 H'F022
Erase block register EBR R/W H'00 H'F023
Flash memory enable register FENR R/W H'00 H'F02B
Note: FLMCR1, FLMCR2, FLPWCR, EBR, and FENR are 8 bit registers. Only byte access is
enabled which are two-state access. These registers are dedicated to the product in which
flash memory is included. The product in which PROM or ROM is included does not have
these registers. When the corresponding address is read in these products, the value is
undefined. A write is disabled.