Rev. 6.00, 08/04, page 305 of 628
Event Counter PWM Data Register H (ECPWDRH)
Bit
Initial value
Read/Write
7
ECPWDRH7
0
W
6
ECPWDRH6
0
W
5
ECPWDRH5
0
W
4
ECPWDRH4
0
W
3
ECPWDRH3
0
W
0
ECPWDRH0
0
W
2
ECPWDRH2
0
W
1
ECPWDRH1
0
W
Note:
When ECPWME in AEGSR is 1, event counter PWM is operating and therefore ECPWDRH
should not be modified.
When changing the data, event counter PWM must be halted by clearing ECPWME to 0 in
AEGSR before modifying ECPWDRH.
ECPWDRH is an 8-bit write-only register that controls event counter PWM waveform generator
data.
Event Counter PWM Data Register L (ECPWDRL)
Bit
Initial value
Read/Write
7
ECPWDRL7
0
W
6
ECPWDRL6
0
W
5
ECPWDRL5
0
W
4
ECPWDRL4
0
W
3
ECPWDRL3
0
W
0
ECPWDRL0
0
W
2
ECPWDRL2
0
W
1
ECPWDRL1
0
W
Note:
When ECPWME in AEGSR is 1, event counter PWM is operating and therefore ECPWDRL
should not be modified.
When changing the data, event counter PWM must be halted by clearing ECPWME to 0 in
AEGSR before modifying ECPWDRL.
ECPWDRL is an 8-bit write-only register that controls event counter PWM waveform generator
data.
Input Pin Edge Selection Register (AEGSR)
Bit
Initial value
Read/Write
7
AHEGS1
0
R/W
6
AHEGS0
0
R/W
5
ALEGS1
0
R/W
4
ALEGS0
0
R/W
3
AIEGS1
0
R/W
0
—
0
R/W
2
AIEGS0
0
R/W
1
ECPWME
0
R/W
AEGSR is an 8-bit read/write register that selects rising, falling, or both edge sensing for the
AEVH, AEVL, and IRQAEC pins.
Summary of Contents for H8/38024 Series
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Page 661: ...H8 38024 H8 38024S H8 38024F ZTAT H8 38124 Group Hardware Manual...