Rev. 6.00, 08/04, page 226 of 628
8.10
Port A
8.10.1
Overview
Port A is a 4-bit I/O port, configured as shown in figure 8.9.
PA
3
/COM
4
PA
2
/COM
3
PA
1
/COM
2
PA
0
/COM
1
Port A
Figure 8.9 Port A Pin Configuration
8.10.2
Register Configuration and Description
Table 8.26 shows the port A register configuration.
Table 8.26
Port A Registers
Name
Abbr.
R/W
Initial Value
Address
Port data register A
PDRA
R/W
H'F0
H'FFDD
Port control register A
PCRA
W
H'F0
H'FFED
Port Data Register A (PDRA)
Bit
Initial value
Read/Write
7
1
6
1
5
1
4
1
3
PA
0
R/W
0
PA
0
R/W
2
PA
0
R/W
1
PA
0
R/W
3
2
1
0
PDRA is an 8-bit register that stores data for port A pins PA
3
to PA
0
. If port A is read while
PCRA bits are set to 1, the values stored in PDRA are read, regardless of the actual pin states. If
port A is read while PCRA bits are cleared to 0, the pin states are read.
Upon reset, PDRA is initialized to H'F0.
Summary of Contents for H8/38024 Series
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Page 661: ...H8 38024 H8 38024S H8 38024F ZTAT H8 38124 Group Hardware Manual...
