Rev. 6.00, 08/04, page 368 of 628
Start
End
Read bits OER
and FER in SSR
[2]
Set bit MPIE to 1
in SCR3
[1]
[3]
[4]
[5]
4
Read bit RDRF
in SSR
Read receive
data in RDR
Clear bit RE to
0 in SCR3
Yes
OER + FER = 1?
No
RDRF = 1?
Yes
Continue data
reception?
No
No
Yes
Read bits OER
and FER in SSR
No
Own ID?
Yes
Read bit RDRF
in SSR
Yes
OER + FER = 1?
No
Read receive
data in RDR
No
RDRF = 1?
Yes
Receive error
processing
(A)
Set bit MPIE to 1 in SCR3.
Read bits OER and FER in the serial
status register (SSR) to determine if
there is an error. If a receive error has
occurred, execute receive error processing.
Read SSR and check that bit RDRF is
set to 1. If it is, read the receive data in
RDR and compare it with this receiver's
own ID. If the ID is not this receiver's,
set bit MPIE to 1 again. When the RDR
data is read, bit RDRF is cleared to 0
automatically.
Read SSR and check that bit RDRF is
set to 1, then read the data in RDR.
If a receive error has occurred, read bits
OER and FER in SSR to identify the error,
and after carrying out the necessary error
processing, ensure that bits OER and FER
are both cleared to 0. Reception cannot be
resumed if either of these bits is set to 1.
In the case of a framing error, a break can
be detected by reading the value of the
RXD
32
pin.
[1]
[2]
[3]
[4]
[5]
Figure 10.19 Example of Multiprocessor Data Reception Flowchart
Summary of Contents for H8/38024 Series
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