Renesas H8/38024 Series, Hardware Manual

Page: 456 / 661

Rev. 6.00, 08/04, page 426 of 628
voltages, the LVDR detection level setting, enabling or disabling of resets triggered by the low-
voltage detection reset circuit (LVDR), and enabling or disabling of interrupts triggered by power
supply voltage drops or rises.
Bit 7—LVD Enable (LVDE)
This bit is used to control whether or not the low-voltage detection circuit is used.
Bit 7
LVDE
Description
0 Low-voltage detection circuit not used (standby status) (initial value)
1 Low-voltage detection circuit used
Bit 6—Reserved
This bit is a read/write enabled reserved bit.
Bit 5—Power Supply Drop (LVDD) Detection Level External Input Select (VINTDSEL)
This bit is used to select the power supply drop detection level.
Bit 5
VINTDSEL
Description
0 LVDD detection level generated by on-chip ladder resistor (initial value)
1 LVDD detection level input to extD pin
Bit 4—Power Supply Rise (LVDU) Detection Level External Input Select (VINTUSEL)
This bit is used to select the power supply rise detection level.
Bit 4
VINTUSEL
Description
0 LVDU detection level generated by on-chip ladder resistor (initial value)
1 LVDU detection level input to extU pin