Rev. 6.00, 08/04, page 156 of 628
6.6
Descriptions of Registers of the Flash Memory
6.6.1
Flash Memory Control Register 1 (FLMCR1)
Bit
7
6
5
4
3
2
1
0
—
SWE
ESU
PSU
EV
PV
E
P
Initial value
0
0
0
0
0
0
0
0
Read/Write
—
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FLMCR1 is a register that makes the flash memory change to program mode, program-verify
mode, erase mode, or erase-verify mode. For details on register setting, refer to section 6.8, Flash
Memory Programming/Erasing. By setting this register, the flash memory enters program mode,
erase mode, program-verify mode, or erase-verify mode. Read the data in the state that bits 6 to 0
of this register are cleared when using flash memory as normal built-in ROM.
Bit 7—Reserved
This bit is always read as 0 and cannot be modified.
Bit 6—Software Write Enable (SWE)
This bit is to set enabling/disabling of programming/enabling of flash memory (set when bits 5 to
0 and the EBR register are to be set).
Bit 6
SWE
Description
0
Programming/erasing is disabled. Other FLMCR1 register bits and all EBR bits
cannot be set.
(initial value)
1
Flash memory programming/erasing is enabled.
Bit 5—Erase Setup (ESU)
This bit is to prepare for changing to erase mode. Set this bit to 1 before setting the E bit to 1 in
FLMCR1 (do not set SWE, PSU, EV, PV, E, and P bits at the same time).
Bit 5
ESU
Description
0
The erase setup state is cancelled
(initial value)
1
The flash memory changes to the erase setup state. Set this bit to 1 before setting
the E bit to 1 in FLMCR1.
Summary of Contents for H8/38024 Series
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