Renesas H8/38024 Series, Hardware Manual

Page: 265 / 661

Rev. 6.00, 08/04, page 235 of 628
Bit 3—TXD
32
Pin Output Data Inversion Switch
Bit 3 specifies whether or not TXD
32
pin output data is to be inverted.
Bit 3
SCINV3
Description
0 TXD
32
output data is not inverted (initial value)
1 TXD
32
output data is inverted
Bit 2—RXD
32
Pin Input Data Inversion Switch
Bit 2 specifies whether or not RXD
32
pin input data is to be inverted.
Bit 2
SCINV2
Description
0 RXD
32
input data is not inverted (initial value)
1 RXD
32
input data is inverted
Bits 1 and 0—Reserved
Bits 1 and 0 are reserved; they can only be written with 0.
8.12.3 Note on Modification of Serial Port Control Register
When a serial port control register is modified, the data being input or output up to that point is
inverted immediately after the modification, and an invalid data change is input or output. When
modifying a serial port control register, do so in a state in which data changes are invalidated.